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UPD70732 Datasheet(PDF) 18 Page - NEC |
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UPD70732 Datasheet(HTML) 18 Page - NEC |
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18 / 66 page  18 µPD70732 4. ADDRESS SPACE The V810 supports 4 Gbytes of linear memory space and I/O space. The CPU outputs 32-bit addresses to the memory and I/Os; therefore, the addresses are from 0 to 232 – 1. Bit number 0 of each byte data is defined as the LSB (Least Significant Bit), and bit number 7 is the MSB (Most Significant Bit). Unless otherwise specified, the byte data at the lower address side of data consisting of two or more bytes is the LSB, and the byte data at the higher address side is the MSB (little endian). Data consisting of 2 bytes is called a halfword, and data consisting of 4 bytes is called a word. The lower address of memory or I/O data of two or more bytes, here, is shown on the right, and the higher address is shown on the left, as follows: Byte of address A Halfword of address A Word/short real of address A 70 A (address) 70 15 8 A (address) A + 1 70 15 8 23 16 31 24 A A + 1 A + 2 A + 3 5 |
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