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UM0851 Datasheet(PDF) 212 Page - STMicroelectronics |
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UM0851 Datasheet(HTML) 212 Page - STMicroelectronics |
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212 / 245 page ![]() Miscellaneous device drivers UM0851 212/245 Doc ID 16604 Rev 2 watchdog is intended to be used to generate a system reset if a software failure (or a system hang) occurs. The main features of the watchdog module are listed below ● 32-bit down counter with a programmable timeout interval ● Interrupt generation on timeout ● Reset signal generation on timeout, if the interrupt from the previous timeout remains pending (not serviced) ● Lock register to protect registers from being altered by runaway software Figure 59. WDT interface The down counter is driven by the WDT clock, which is the oscillator clock, 30 MHz in SPEAr600 and 24 MHz in SPEAr3xx. 9.2.2 Software overview The watchdog driver for SPEAr in the Linux support package is part of standard Linux watchdog framework. Watchdog drivers in Linux are based on character device using misc device layer and provide a standard set of ioctls to the user. Through this interface you can configure, program and refresh the watchdog timer. You can use the standard Linux watchdog daemon to configure and periodically pat (refresh) the driver in order to avoid system reset. A software crash or hang would thus prevent this pat from happening and hence cause a system reset after timeout. The following figure describes the watchdog framework. Watchdog timer Load register Control register 32-bit down counter Interrupt and reset generation APB interface WDT clock WDT interrupt WDT reset |
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