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UM1865 Datasheet(PDF) 129 Page - STMicroelectronics

Part # UM1865
Description  The purpose of this document is to describe the design of the application
PDF  132 Pages
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Manufacturer  STMICROELECTRONICS [STMicroelectronics]
Direct Link  http://www.st.com
Logo STMICROELECTRONICS - STMicroelectronics

UM1865 Datasheet(HTML) 129 Page - STMicroelectronics

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UM1865
SPI interface
132
5.2.2
Write data to BlueNRG-MS
To write data to the BlueNRG-MS, the SPI master must start an SPI frame to check the
BlueNRG-MS SPI header, and the following 3 conditions must be met:
1.
The master sends the CTRL byte as 0x0A.
2.
The slave replies with SPI READY byte as 0x02.
3.
The write buffer size is bigger than 0.
If so, the master can put the data bytes following the 5 header bytes on the MOSI line in the
same transaction.
If the master is fast enough, it may start sending data bytes immediately in the same SPI
transaction where the 3 conditions are just seen satisfied. Or the master may choose to stop
the SPI transaction for now, go back to prepare the data, and send them in a later SPI
transaction.
The SPI master is allowed to write less bytes than the write buffer size, but it is forbidden to
write more. In case an ACI command packet is bigger than 128 bytes. The master has to
send it in 2 SPI write transactions. The master firstly sends 128 bytes, then waiting for the
write buffer to be available again, and then write the remaining bytes.
The BlueNRG-MS will count how many bytes are actually received on the MOSI line. So the
master does not need to indicate how many bytes it intends to write.
The write buffer size value is the data bytes of the payload. It does not include the 5 header
bytes.
When the master is sending real data bytes on the MOSI line, the BlueNRG-MS will return
the same amount of bytes from its own shift register. The master should ignore these bytes.
5.2.3
Read data from BlueNRG-MS
The BlueNRG-MS uses the IRQ pin to notify the SPI master when it has data to be read.
When the SPI master sees the IRQ pin become high, it should read data from BlueNRG-
MS.
The protocol is similar to SPI write. The SPI master starts a transaction to check the SPI
header. The master puts 0xB in the CTRL byte, and checks again if the slave is ready
(0x02), and the read buffer size is non-zero. Then the master sends certain amount of
dummy bytes (e.g. 0x00 or 0xFF) on the MOSI line, while reading back the slave data from
the MISO line. The reading process can happen in 1 SPI transaction or in multiple SPI
transactions.
The SPI master should read from BlueNRG-MS as long as the IRQ pin is high.



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