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TLV707P Datasheet(PDF) 19 Page - Texas Instruments |
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TLV707P Datasheet(HTML) 19 Page - Texas Instruments |
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19 / 42 page ![]() t = (120 R ) (120+R ) L L · · C OUT TLV707, TLV707P www.ti.com SBVS153D – FEBRUARY 2011 – REVISED JANUARY 2015 Feature Description (continued) 8.3.2 Shutdown The enable pin (EN) is active high. The device is enabled when voltage at the EN pin goes above 0.9 V. This relatively lower voltage value required to turn on the LDO can also be used to power the device when it is connected to a GPIO of a newer processor, where the GPIO Logic 1 voltage level is lower than that of traditional microcontrollers. The device is turned off when the EN pin is held at less than 0.4 V. When shutdown capability is not required, EN can be connected to the IN pin. The TLV707xxP version has internal active pulldown circuitry that discharges the output with a time constant of: where: • RL = Load resistance • COUT = Output capacitor (1) 8.3.3 Undervoltage Lockout (UVLO) The TLV707 uses a UVLO circuit to keep the output shut off until internal circuitry is operating properly. 8.4 Device Functional Modes In order to turn on the regulator, it is required to drive the EN pin over 0.9 V. Driving the EN pin below 0.4 V causes the regulator to enter shutdown mode. In shutdown, the current consumption of the device is reduced to 1 µA, typically. Copyright © 2011–2015, Texas Instruments Incorporated Submit Documentation Feedback 19 |
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