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MAX7652CCB Datasheet(PDF) 31 Page - Maxim Integrated Products |
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MAX7652CCB Datasheet(HTML) 31 Page - Maxim Integrated Products |
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31 / 36 page ![]() Flash Programmable 12-Bit Integrated Data-Acquisition Systems ______________________________________________________________________________________ 31 Interrupt System The MAX7651/MAX7652 has ten program-assist inter- rupts that are either external or internal to the 8051 sys- tem. Table 24 shows the SFR bit locations for interrupt enable and priority control. Shaded Table regions reflect the 8051 industry standard. Set SFR bit IE.7 high to enable all interrupts. See the MAX7651/MAX7652 Programmer’s Reference Manual. Timers The MAX7651/MAX7652 feature several modes of tim- ing control through the CKCON special function regis- ter. Table 25 shows the CKCON SFR format. The individual control bits can be used to set the number of clock cycles needed (four or twelve) to increment each timer/counter or the number of clock cycles needed to execute the MOVX instruction. See the MAX7651/ MAX7652 Programmer’s Reference Manual for further details. Analog and Digital Supplies The MAX7651/MAX7652 have multiple power-supply inputs: one analog AVDD and three digital DVDD. The pulse width modulators have their own power supply inputs, PWMV and PWMG. Decouple all supply inputs with a 0.1µF capacitor in parallel with a 10µF low ESR capacitor, with both capacitors as close to the supply pins as possible and with the shortest possible connec- tion to the ground plane. PARAMETER MIN MAX COMMENTS TPROGL 10TCK TPROGL must equal TWRITE during lockbit writes TASUW 3TCK TWRITE 7TCK + 54 µs7TCK + 72µs TADSUR 3TCK TREAD 8TCK + 50ns Read access time TP27L 10TCK TP27H 3TCK TCK 83ns 250ns Table 23 Note: P2.6, P2.7, P3.6, and P3.7 must also meet TASUW (min) timing specification. PROGRAM LOCK BITS LB1 LB2 LB3 PROTECTION TYPE 1 1 1 1 No program lock features (Default after a mass erase) 20 11 MOVC instructions executed from external program memory are disabled from fetching code bytes from internal memory, EA is sampled and latched on reset (RST), and further external data programming of both FLASH arrays is disabled. 3 0 0 1 Verify (read) is disabled. (see Mode 2) 4 0 0 0 External execution is disabled (EA override, see Mode 3). Table 24. Lock Bit Protection Modes ADDRESS DATA MEANING 30H 7FH JEDEC Continuation Byte 31H CBH Manufactured by Maxim 32H 20H MAX7651/MAX7652 Table 25. MAX7651/MAX7652 Signature Bits |
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