MAX7652CCB datasheet(32/36 Pages) MAXIM

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Flash Programmable 12-Bit Integrated

Data-Acquisition Systems

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Power Requirements

MAX7651 operates from +5V while the MAX7652 oper-

ates from +3V analog and digital supply voltages. The

analog supply current is typically 2mA. The typical digi-

tal supply currents (continuous A/D conversions at

12MHz clock frequency) are 5mA and 13mA at +3V

and +5V, respectively. Current consumption will vary

depending on RAM read/write and flash read/write

page erase duty cycle.

Idle Mode

In idle mode, CPU processing is suspended and inter-

nal data registers maintain their current data. However,

unlike typical 8051 systems, the clock is not disabled

internally. Set PCON.0 (IDLE) high to enter the Idle

INTERRUPT

ASSOCIATED FEATURE

ENABLE SFR BIT

(NOTE 2)

PRIORITY SFR BIT

(NOTE 3)

PRIORITY

INT0

External Interrupt 0

IE.0

IP.0

INT1

External Interrupt 1

IE.2

IP.1

FLASH

Flash Operation Complete

EIE.0

EIP.0

ADC

A / D Operation Complete

EIE.1

EIP.1

WDTI

Watchdog Timer

EICON.1

EIP.4

TF0 or EXF0

Timer 0

IE.1

IP.1

TF1 or EXF2

Timer 1

IE.3

IP.3

TI_0 or RI_0

Serial Port 0

IE.4

IP.4

TF2 or EXF2

Timer 2

IE.5

IP.5

TI_1 or RI_1

Serial Port 1

IE.6

IP.6

Table 26. MAX7651/MAX7652 Interrupts (Note 1)

Note 1: Shaded areas reflect the 8051 industry standard.

Note 2: Set Enable SFR bit high to enable interrupt.

Note 3: Set Priority SFR bit high to eatablish high priority.

BIT 7

(MSB)

BIT 6

BIT 5

BIT 4

BIT 3

BIT 2

BIT 1

BIT 0

(LSB)

WD1

WD0

TIMER2

TIMER1

TIMER0

MD2

MD1

MD0

BIT

NAME

DESCRIPTION

WD1

WD10

Set WD1 and WD0 to adjust the interrupt interval for the watchdog timer. (See Watchdog Timer.)

TIMER2

Timer 2 Control. Set TIMER2 = 1 for TIMER2-associated counter increments at four clock

intervals. Set TIMER2 = 0 for increments at 12 clock intervals.

TIMER1

Timer 1 Control. Set TIMER1 = 1 for Timer1-associated counter increments at four clock

intervals. Set TIMER1 = 0 for increments at 12 clock intervals.

TIMER0

Timer 0 Control. Set TIMER0 = 1 for Timer0-associated counter increments at four clock

intervals. Set TIMER0 = 0 for increments at 12 clock intervals.

MD2

MD1

MD0

Set MD2, MD1, and MD0 to adjust the Read/Write strobe width (in clocks). The number of clock

cycles is two plus the MD2, MD1, MD0 decimal value. MD0 is the LSB.

Table 27. CKCON SFR Address 8EH

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