1024 System Clock Periods

Required for Initialization

SCKI

Internal

Reset

0V

0V

0V

t

RST

Internal

Reset

Output

Data Pins

Valid Output Data

Outputs are Forced Low

for 1024 SCKI Periods

Valid Output Data

Outputs are Forced Low

Initialization

Period

H I

L O

PCM4202-EP

www.ti.com

SGLS388

– JUNE 2007

Figure 9. External Reset Timing

Figure 10. ADC Digital Output State for Reset Operations

POWER-DOWN OPERATION

The PCM4202 can be forced to a power-down state by applying a low level to the RST input (pin 19) for a

minimum of 65,536 system clock cycles. In power-down mode, all internal clocks are stopped, and output data

pins are forced low. The system clock may then be removed to conserve additional power. Before exiting

power-down mode, the system and audio clocks should be restarted. Once the clocks are active, the RST input

may be driven high, which initiates a reset initialization sequence. Figure 11 illustrates the state of the output

data pins during before, during, and upon exiting the power-down state.

APPLICATIONS INFORMATION

A typical connection diagram for the PCM4202 is shown in Figure 12. Capacitors for power supply and reference

bypassing are shown with recommended values. Bypass capacitors should be located as close as possible to

the power supply and reference pins of the PCM4202. Due to its small size, the 0.1

μF capacitor can be located

on the component (top) side of the board, while the larger 33

μF capacitor can be located on the solder (bottom)

side of the board.

A single ground plane is utilized for the analog and digital ground connections. This approach ensures a low

impedance connection between the analog and digital ground pins. The 5 V analog and 3.3 V digital power

connections are provided from separate supplies.

Figure 13 illustrates an example input buffer circuit, designed for balanced differential input signals. This circuit is

utilized on the PCM4202EVM evaluation board. The 2.7 nF and 100 pF capacitors shown at the output of the

buffer should be located as close as possible to the analog input pins of the PCM4202. The buffer shown in

Figure 13 can be easily made to function as a single ended to differential converter by simply grounding the (

–)

input terminal of the buffer circuit.

Copyright

© 2007, Texas Instruments Incorporated

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Product Folder Link(s): PCM4202-EP