Output

Data Pins

65,536

SCKI Periods

Valid Output Data

Outputs are

Forced Low

RST

LO

HI

1024

SCKI Periods

Required for

Initialization

Valid Output Data

Outputs are

Forced Low

O utputs are

Forced Low

Enter

Power- Down

State

V

R EF

L

A G N D L

V

C OM

L

V

IN

L+

V

IN

L-

F M T 0

F M T 1

S /M

F S 0

F S 1

F S 2

H P F D

D G N D

V

D D

V

R EF

R

A G N D R

V

C O M

R

V

IN

R +

V

IN

R -

AG ND

V

C C

C L IP L

C LIP R

R ST

S C K I

L R C K or D S D B C K

B C K o r D S D L

D A T A or D S D R

1

2

3

4

5

6

7

8

9

1 0

1 1

1 2

1 3

1 4

2 8

2 7

2 6

2 5

2 4

2 3

2 2

2 1

2 0

1 9

1 8

1 7

1 6

1 5

P C M 4 20 2

+

3 3µ F

0.1 µF

0 .1 µF

+

3 3 µ F

+5 V

R ig h t C h a n n e l

An a lo g In pu t

0 .1 µF

3 3 µF

0 .1 µF

Le ft C h a n n e l

An a log Inp u t

In pu t Bu ffe r

F ro m

Lo g ic, µP ,

o r

Ha rd wire d

C o n n e c tion

0 .1 µF

3 3 µF

0 .1 µ F

Digita l Au dio

Tra ns m itte r o r

P ro c e s s o r

To C lip p in g

In dica to rs

To A/D o r S ys te m R e s e t

To Aud io S ys te m C lo c k

+3 .3V

PCM4202-EP

SGLS388

– JUNE 2007

www.ti.com

outputs from the PCM4202. A voltage follower circuit is required to buffer these outputs, with a typical circuit

configuration shown in Figure 14. An OPA227 is utilized as the buffer for the PCM4202EVM evaluation board.

However, alternative op amps with comparable performance may be substituted.

Figure 11. ADC Digital Output State for Power-Down Operations

Figure 12. Typical Connection Diagram

22

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© 2007, Texas Instruments Incorporated

Product Folder Link(s): PCM4202-EP