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PCM4202 Datasheet(PDF) 3 Page - Texas Instruments |
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PCM4202 Datasheet(HTML) 3 Page - Texas Instruments |
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3 / 30 page  PCM4202-EP www.ti.com SGLS388 – JUNE 2007 ELECTRICAL CHARACTERISTICS All parameters are specified at TA = 25°C with VCC = 5 V, VDD = 3.3 V (unless otherwise noted), and a measurement bandwidth from 20 Hz to 20 kHz, unless otherwise noted. System clock frequency is equal to 256 fS for Single and Dual Rate sampling modes, and 128 fS for Quad Rate sampling mode. PCM4202 PARAMETER TEST CONDITIONS UNIT MIN TYP MAX RESOLUTION 24 Bits AUDIO DATA FORMAT Linear PCM interface formats Two ’s complement, MSB first data I2S, Left or Right Justified Linear PCM word length 24 Bits Direct Stream Digital (DSD) output 1 Bit DIGITAL CHARACTERISTICS VIH 0.7 × VDD VDD V Input logic level VIL 0 0.3 × VDD V VOH IOH = –2 mA 0.8 × VDD V Output logic level VOL IOL = 2 mA 0.2 × VDD V IIH VIN = VDD ( – 40°C to 85°C) 10 μA Input current IIL VIN = 0 V ( – 40°C to 85°C) –10 μA IIH VIN = VDD ( – 40°C to 85°C) 25 μA Input current(1) IIL VIN = 0 V ( – 40°C to 85°C) –25 μA Single rate 8 54 Sampling frequency(2) fS Dual rate 54 108 kHz Quad rate 108 216 System clock duty cycle 45 50 55 % Single rate, SCKI = 256fS 2.048 13.824 MHz Single rate, SCKI = 384fS 3.072 20.736 MHz Single rate, SCKI = 512fS 4.096 27.648 MHz Single rate, SCKI = 768fS 6.144 38.4 MHz System clock frequency(2) Dual rate, SCKI = 256fS 13.824 27.648 MHz Dual rate, SCKI = 384fS 20.736 38.4 MHz Quad rate, SCKI = 128fS 13.824 27.648 MHz Quad rate, SCKI = 192fS 20.736 38.4 MHz ANALOG INPUTS Input voltage, full-scale Differential input 6 VPP Input impedance 3 k Ω Common-mode rejection 85 dB DC PERFORMANCE Output offset error HPFD = 1 ±4 % of FSR Gain error ±4 % of FSR Gain mismatch channel-to-channel ±3 % of FSR (1) Applies to the RST input, pin 19. (2) Single, Dual, and Quad Rate sampling modes are described within this data sheet. Copyright © 2007, Texas Instruments Incorporated Submit Documentation Feedback 3 Product Folder Link(s): PCM4202-EP |
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