AM4376 datasheet(120/261 Pages) TI

120 / 261 page

AM4376, AM4377, AM4378, AM4379

SPRS851B – JUNE 2014 – REVISED APRIL 2015

www.ti.com

Table 5-10. Power-Supply Decoupling Capacitor Characteristics (continued)

PARAMETER

TYP

UNIT

CVDDSHV9

(6)

10.02

μF

CVDDSHV10

(6)

10.02

μF

CVDDSHV11

(6)

10.02

μF

(1) Typical values consist of 1 capacitor of 10

μF and 4 capacitors of 10 nF.

(2) Typical values consist of 1 capacitor of 2.2

μF and 1 capacitor of 10 nF.

(3) For more details on decoupling capacitor requirements for the DDR3 and DDR3L memory interface, see Section 5.12.8.2.1.3.6 and

Section 5.12.8.2.1.3.7 when using DDR3 and DDR3L memory devices.

(4) VDDS_SRAM_CORE_BG supply powers an internal LDO for SRAM supplies. Inrush currents could cause voltage drop on the

VDDS_SRAM_CORE_BG supplies when the SRAM LDO is enabled after powering up VDDS_SRAM_CORE_BG terminals. A 10

μF is

recommended to be placed close to the terminal and routed with widest traces possible to minimize the voltage drop on

VDDS_SRAM_CORE_BG terminals.

(5) VDDS_SRAM_MPU_BB supply powers an internal LDO for SRAM supplies. Inrush currents could cause voltage drop on the

VDDS_SRAM_MPU_BB supplies when the SRAM LDO is enabled after powering up VDDS_SRAM_MPU_BB terminals. A 10

μF is

recommended to be placed close to the terminal and routed with widest traces possible to minimize the voltage drop on

VDDS_SRAM_MPU_BB terminals.

(6) Typical values consist of 1 capacitor of 10

μF and 2 capacitors of 10 nF.

(7) Typical values consist of 1 capacitor of 10

μF and 6 capacitors of 10 nF.

5.11.2 Output Capacitors

Internal low dropout output (LDO) regulators require external capacitors to stabilize their outputs. These

capacitors should be placed as close as possible to the respective terminals of the device. Table 5-11

summarizes the LDO output capacitor recommendations.

Table 5-11. Output Capacitor Characteristics

PARAMETER

TYP

UNIT

CCAP_VDD_SRAM_CORE

(1)

μF

CCAP_VDD_RTC

(1) (2)

μF

CCAP_VDD_SRAM_MPU

(1)

μF

CCAP_VBB_MPU

(1)

μF

CCAP_VDDS1P8V_IOLDO

(1) (3)

2.2

μF

(1)

LDO regulator outputs should not be used as a power source for any external components.

(2)

The CAP_VDD_RTC terminal operates as an input to the RTC core voltage domain when the RTC_KALDO_ENn terminal is high.

(3)

The CAP_VDDS1P8V_IOLDO terminal is the output of the IO LDO and required for simplified power sequencing. For more details, see

Figure 5-8. If simplified power sequencing is not utilized, this terminal can be left floating.

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