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AM5728 Datasheet(PDF) 169 Page - Texas Instruments |
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AM5728 Datasheet(HTML) 169 Page - Texas Instruments |
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169 / 415 page  AM5728, AM5726 www.ti.com SPRS915O – MARCH 2014 – REVISED OCTOBER 2015 Table 5-9. Maximum Supported Frequency (continued) Module Clock Sources Clock Max. Clock PLL / OSC / Source PLL / OSC / Instance Name Input Clock Name PRCM Clock Name Type Allowed (MHz) Clock Name Source Name GPU GPU_FCLK1 Func GPU_CLK GPU_CORE_GCLK CORE_GPU_CLK DPLL_CORE PER_GPU_CLK DPLL_PER GPU_GCLK DPLL_GPU GPU_FCLK2 Func GPU_CLK GPU_HYD_GCLK CORE_GPU_CLK DPLL_CORE PER_GPU_CLK DPLL_PER GPU_GCLK DPLL_GPU GPU_ICLK Int 266 GPU_L3_GICLK CORE_X2_CLK DPLL_CORE HDMI PHY DSS_HDMI_PHY_ Func 38.4 HDMI_PHY_GFCLK FUNC_192M_CLK DPLL_PER CLK HDQ1W HDQ1W_ICLK Int & 266 L4PER_L3_GICLK CORE_X2_CLK DPLL_CORE Func HDQ1W_FCLK Func 12 PER_12M_GFCLK FUNC_192M_CLK DPLL_PER I2C1 I2C1_ICLK Int 266 L4PER_L3_GICLK CORE_X2_CLK DPLL_CORE I2C1_FCLK Func 96 PER_96M_GFCLK FUNC_192M_CLK DPLL_PER I2C2 I2C2_ICLK Int 266 L4PER_L3_GICLK CORE_X2_CLK DPLL_CORE I2C2_FCLK Func 96 PER_96M_GFCLK FUNC_192M_CLK DPLL_PER I2C3 I2C3_ICLK Int 266 L4PER_L3_GICLK CORE_X2_CLK DPLL_CORE I2C3_FCLK Func 96 PER_96M_GFCLK FUNC_192M_CLK DPLL_PER I2C4 I2C4_ICLK Int 266 L4PER_L3_GICLK CORE_X2_CLK DPLL_CORE I2C4_FCLK Func 96 PER_96M_GFCLK FUNC_192M_CLK DPLL_PER I2C5 I2C5_ICLK Int 266 IPU_L3_GICLK CORE_X2_CLK DPLL_CORE I2C5_FCLK Func 96 IPU_96M_GFCLK FUNC_192M_CLK DPLL_PER IEEE1500_2_OCP PI_L3CLK Int & 266 L3INIT_L3_GICLK CORE_X2_CLK DPLL_CORE Func IPU1 IPU1_GFCLK Int & 425.6 IPU1_GFCLK DPLL_ABE_X2_CLK DPLL_ABE Func CORE_IPU_ISS_BOOS DPLL_CORE T_CLK IPU2 IPU2_GFCLK Int & 425.6 IPU2_GFCLK CORE_IPU_ISS_BOOS DPLL_CORE Func T_CLK IVA IVA_GCLK Int IVA_GCLK IVA_GCLK IVA_GFCLK DPLL_IVA KBD KBD_FCLK Func 0.032 WKUPAON_SYS_GFC WKUPAON_32K_GFCL OSC1 LK K PICLKKBD Func 0.032 WKUPAON_SYS_GFC RTC Oscillator LK KBD_ICLK Int 38.4 WKUPAON_GICLK SYS_CLK1 OSC1 PICLKOCP Int 38.4 WKUPAON_GICLK DPLL_ABE_X2_CLK DPLL_ABE L3_INSTR L3_CLK Int L3_CLK L3INSTR_L3_GICLK CORE_X2_CLK DPLL_CORE L3_MAIN L3_CLK1 Int L3_CLK L3MAIN1_L3_GICLK CORE_X2_CLK DPLL_CORE L3_CLK2 Int L3_CLK L3INSTR_L3_GICLK CORE_X2_CLK DPLL_CORE L4_CFG L4_CFG_CLK Int 133 L4CFG_L3_GICLK CORE_X2_CLK DPLL_CORE L4_PER1 L4_PER1_CLK Int 133 L4PER_L3_GICLK CORE_X2_CLK DPLL_CORE L4_PER2 L4_PER2_CLK Int 133 L4PER2_L3_GICLK CORE_X2_CLK DPLL_CORE L4_PER3 L4_PER3_CLK Int 133 L4PER3_L3_GICLK CORE_X2_CLK DPLL_CORE L4_WKUP L4_WKUP_CLK Int 38.4 WKUPAON_GICLK SYS_CLK1 OSC1 DPLL_ABE_X2_CLK DPLL_ABE MAILBOX1 MAILBOX1_FLCK Int 266 L4CFG_L3_GICLK CORE_X2_CLK DPLL_CORE MAILBOX2 MAILBOX2_FLCK Int 266 L4CFG_L3_GICLK CORE_X2_CLK DPLL_CORE MAILBOX3 MAILBOX3_FLCK Int 266 L4CFG_L3_GICLK CORE_X2_CLK DPLL_CORE Copyright © 2014–2015, Texas Instruments Incorporated Specifications 169 Submit Documentation Feedback Product Folder Links: AM5728 AM5726 |
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