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AM5728 Datasheet(PDF) 166 Page - Texas Instruments |
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AM5728 Datasheet(HTML) 166 Page - Texas Instruments |
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166 / 415 page  AM5728, AM5726 SPRS915O – MARCH 2014 – REVISED OCTOBER 2015 www.ti.com Table 5-8. Supported OPP vs Max Frequency (2) DESCRIPTION OPP_NOM OPP_OD OPP_HIGH Max Freq. (MHz) Max Freq. (MHz) Max Freq. (MHz) VD_MPU MPU_CLK 1000 1176 1500 VD_DSPEVE DSP_CLK 600 700 750 VD_IVA IVA_GCLK 388.3 430 532 VD_GPU GPU_CLK 425.6 500 532 VD_CORE CORE_IPUx_CLK 212.8 N/A N/A L3_CLK 266 N/A N/A DDR3 / DDR3L 532 (DDR3-1066) N/A N/A VD_RTC RTC_FCLK 0.034 N/A N/A (1) N/A in this table stands for Not Applicable. (2) Maximum supported frequency is limited according to the Device Speed Grade (see Table 5-5). 5.5.3 Maximum Supported Frequency Device modules either receive their clock directly from an external clock input, directly from a PLL, or from a PRCM. Table 5-9 lists the clock source options for each module on this device, along with the maximum frequency that module can accept. To ensure proper module functionality, the device PLLs and dividers must be programmed not to exceed the maximum frequencies listed in this table. Table 5-9. Maximum Supported Frequency Module Clock Sources Clock Max. Clock PLL / OSC / Source PLL / OSC / Instance Name Input Clock Name PRCM Clock Name Type Allowed (MHz) Clock Name Source Name AES1 AES1_L3_CLK Int 266 L4SEC_L3_GICLK CORE_X2_CLK DPLL_CORE AES2 AES2_L3_CLK Int 266 L4SEC_L3_GICLK CORE_X2_CLK DPLL_CORE BB2D BB2D_FCLK Func 354.6 BB2D_GFCLK BB2D_GFCLK DPLL_CORE BB2D_ICLK Int 266 DSS_L3_GICLK CORE_X2_CLK DPLL_CORE COUNTER_32K COUNTER_32K_F Func 0.032 FUNC_32K_CLK SYS_32K RTC Oscillator CLK COUNTER_32K_IC Int 38.4 WKUPAON_GICLK SYS_CLK1 OSC1 LK DPLL_ABE_X2_CLK DPLL_ABE CTRL_MODULE_B L3INSTR_TS_GCL Int 4.8 L3INSTR_TS_GCLK SYS_CLK1 OSC1 ANDGAP K DPLL_ABE_X2_CLK DPLL_ABE CTRL_MODULE_C L4CFG_L4_GICLK Int 133 L4CFG_L4_GICLK CORE_X2_CLK DPLL_CORE ORE CTRL_MODULE_ WKUPAON_GICLK Int 38.4 WKUPAON_GICLK SYS_CLK1 OSC1 WKUP DPLL_ABE_X2_CLK DPLL_ABE DCAN1 DCAN1_FCLK Func 38.4 DCAN1_SYS_CLK SYS_CLK1 OSC1 SYS_CLK2 OSC2 DCAN1_ICLK Int 266 WKUPAON_GICLK SYS_CLK1 OSC1 DPLL_ABE_X2_CLK DPLL_ABE DCAN2 DCAN2_FCLK Func 38.4 DCAN2_SYS_CLK SYS_CLK1 OSC1 DCAN2_ICLK Int 266 L4PER2_L3_GICLK CORE_X2_CLK DPLL_CORE 166 Specifications Copyright © 2014–2015, Texas Instruments Incorporated Submit Documentation Feedback Product Folder Links: AM5728 AM5726 |
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