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AM5728 Datasheet(PDF) 164 Page - Texas Instruments

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Part # AM5728
Description  AM572x SitaraTM Processors
PDF  415 Pages
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Manufacturer  TI [Texas Instruments]
Direct Link  http://www.ti.com
Logo TI - Texas Instruments

AM5728 Datasheet(HTML) 164 Page - Texas Instruments

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AM5728, AM5726
SPRS915O – MARCH 2014 – REVISED OCTOBER 2015
www.ti.com
Table 5-4. Recommended Operating Conditions (continued)
PARAMETER
DESCRIPTION
MIN (2)
NOM
MAX DC (3)
MAX (2)
UNIT
Dual Voltage (1.8V or
1.8-V Mode
1.71
1.80
1.836
1.89
V
3.3V) power supply for
3.3-V Mode
the MMC1 Power Group
3.135
3.30
3.366
3.465
vddshv8
pins
Maximum noise (peak-
1.8-V Mode
mVPPmax
50
peak)
3.3-V Mode
Dual Voltage (1.8V or
1.8-V Mode
1.71
1.80
1.836
1.89
V
3.3V) power supply for
3.3-V Mode
the RGMII Power Group
3.135
3.30
3.366
3.465
vddshv9
pins
Maximum noise (peak-
1.8-V Mode
mVPPmax
50
peak)
3.3-V Mode
vss
Ground supply
0
V
DPLL_HDMI and HDMI PHY analog
V
vssa_hdmi
0
ground
vssa_pcie
PCIe analog ground
0
V
HS USB1 and HS USB2 analog
V
vssa_usb
0
ground
DPLL_USB and USB3.0 RX/TX
V
vssa_usb3
0
analog ground
DPLL_VIDEO1 and DPLL_VIDEO2
V
vssa_video
0
analog ground
vssa_osc0
OSC0 analog ground
0
V
vssa_osc1
OSC1 analog ground
0
V
Operating junction
Commercial
0
90
°C
TJ
temperature range
Extended
-40
105
Output Power Supply Voltage Range
ddr1_vref0
Reference Power Supply EMIF1
0.5*vdds_ddr1
V
ddr2_vref0
Reference Power Supply EMIF2
0.5*vdds_ddr2
V
(1) Refer to Section 5.3, Power on Hour (POH) Limits for limitations.
(2) The voltage at the device ball should never be below the MIN voltage or above the MAX voltage for any amount of time. This
requirement includes dynamic voltage events such as AC ripple, voltage transients, voltage dips, etc.
(3) The DC voltage at the device ball should never be above the MAX DC voltage to avoid impact on device reliability and lifetime POH
(Power on Hour). The MAX DC voltage is defined as the highest allowed DC regulated voltage, without transients, seen at the ball.
5.5
Operating Performance Points
This section describes the operating conditions of the AM572x device. This section also contains the
description of each OPP (operating performance point) for processor clocks and device core clocks.
Table 5-5 describes the maximum supported frequency per speed grade for AM572x devices.
Table 5-5. Speed Grade Maximum Frequency
Device Speed
Maximum frequency (MHz)
MPU
DSP
IVA
GPU
IPU
L3
DDR3/DDR3L
AM5728
1500
750
532
532
212.8
266
533 (DDR3-1066)
AM5726
1500
750
N/A
N/A
212.8
266
533 (DDR3-1066)
(1) N/A in this table stands for Not Applicable
5.5.1
AVS and ABB Requirements
Adaptive Voltage Scaling (AVS) and Adaptive Body Biasing (ABB) are required on most of the vdd_*
supplies as defined in Table 5-6.
164
Specifications
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