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AM5728 Datasheet(PDF) 184 Page - Texas Instruments |
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AM5728 Datasheet(HTML) 184 Page - Texas Instruments |
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184 / 415 page ![]() AM5728, AM5726 SPRS915O – MARCH 2014 – REVISED OCTOBER 2015 www.ti.com Table 5-10. LVCMOS DDR DC Electrical Characteristics (continued) PARAMETER MIN NOM MAX UNIT Differential Receiver Mode VSWING Input voltage swing DDR3/DDR3L 0.2 vdds+0.4 V VCM Input common-mode voltage VREF - VREF+ 10%vdds 10%vdds CPAD Pad capacitance (including package capacitance) 3 pF (1) VDDS in this table stands for corresponding power supply (i.e. vdds_ddr1 or vdds_ddr2). For more information on the power supply name and the corresponding ball, see Table 4-2, POWER [11] column. (2) VREF in this table stands for corresponding Reference Power Supply (i.e. ddr1_vref0 or ddr2_vref0). For more information on the power supply name and the corresponding ball, see Table 4-2, POWER [11] column. 5.6.2 HDMIPHY DC Electrical Characteristics The HDMIPHY DC Electrical Characteristics are compliant with the HDMI 1.4a specification and are not reproduced here. 5.6.3 Dual Voltage LVCMOS I 2C DC Electrical Characteristics Table 5-11 summarizes the DC electrical characteristics for Dual Voltage LVCMOS I2C Buffers. NOTE For more information on the I/O cell configurations, see the Control Module section of the Device TRM. Table 5-11. Dual Voltage LVCMOS I2C DC Electrical Characteristics PARAMETER MIN NOM MAX UNIT Signal Names in MUXMODE 0: i2c2_scl, i2c1_scl, i2c1_sda, i2c2_sda; Balls: F17 / C20 / C21 / C25; I2C Standard Mode – 1.8 V VIH Input high-level threshold 0.7*VDDS V VIL Input low-level threshold 0.3*VDDS V Vhys Hysteresis 0.1*VDDS V IIN Input current at each I/O pin with an input voltage 12 µA between 0.1*VDDS to 0.9*VDDS IOZ IOZ(IPAD Current) for BIDI cell. This current is 12 µA contributed by the tristated driver leakage + input current of the Rx + weak pullup/pulldown leakage. PAD is swept from 0 to VDDS and the Max(I(PAD)) is measured and is reported as IOZ CIN Input capacitance 10 pF VOL3 Output low-level threshold open-drain at 3-mA 0.2*VDDS V sink current IOLmin Low-level output current @VOL=0.2*VDDS 3 mA tOF Output fall time from VIHmin to VILmax with a bus 250 ns capacitance CB from 5 pF to 400 pF I2C Fast Mode – 1.8 V VIH Input high-level threshold 0.7*VDDS V VIL Input low-level threshold 0.3*VDDS V Vhys Hysteresis 0.1*VDDS V IIN Input current at each I/O pin with an input voltage 12 µA between 0.1*VDDS to 0.9*VDDS 184 Specifications Copyright © 2014–2015, Texas Instruments Incorporated Submit Documentation Feedback Product Folder Links: AM5728 AM5726 |
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