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AM5728 Datasheet(PDF) 234 Page - Texas Instruments |
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AM5728 Datasheet(HTML) 234 Page - Texas Instruments |
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234 / 415 page  AM5728, AM5726 SPRS915O – MARCH 2014 – REVISED OCTOBER 2015 www.ti.com Table 7-14. Manual Functions Mapping for VIP3 (continued) BALL BALL NAME VIP3_MANUAL1 VIP3_MANUAL2 CFG REGISTER MUXMODE A_DELAY G_DELAY A_DELAY G_DELAY 7 9 (ps) (ps) (ps) (ps) AB8 mmc3_dat6 4000 1614 4876 941 CFG_MMC3_DAT6_IN - vin5a_hsy nc0 AB5 mmc3_dat7 4153 1287 5025 540 CFG_MMC3_DAT7_IN - vin5a_vsyn c0 D18 xref_clk0 1567 0 1873 0 CFG_XREF_CLK0_IN vin6a_d0 - E17 xref_clk1 0 0 0 0 CFG_XREF_CLK1_IN vin6a_clk0 - 7.7 Display Subsystem – Video Output Ports Three Display Parallel Interfaces (DPI) channels are available in DSS named DPI Video Output 1, DPI Video Output 2 and DPI Video Output 3. NOTE The DPI Video Output i (i = 1 to 3) interface is also referred to as VOUTi. Every VOUT interface consists of: • 24-bit data bus (data[23:0]) • Horizontal synchronization signal (HSYNC) • Vertical synchronization signal (VSYNC) • Data enable (DE) • Field ID (FID) • Pixel clock (CLK) NOTE For more information, see the Display Subsystem chapter of the Device TRM. CAUTION The IO timings provided in this section are only valid if signals within a single IOSET are used. The IOSETs are defined in the Table 7-17 and Table 7-18. CAUTION The IO Timings provided in this section are only valid for some DSS usage modes when the corresponding Virtual IO Timings or Manual IO Timings are configured as described in the tables found in this section. Table 7-15, Table 7-16 and Figure 7-6 assume testing over the recommended operating conditions and electrical characteristic conditions. Table 7-15. DPI Video Output i (i = 1..3) Default Switching Characteristics NO. PARAMETER DESCRIPTION MODE MIN MAX UNIT D1 tc(clk) Cycle time, output pixel clock vouti_clk 11.76 ns 234 Timing Requirements and Switching Characteristics Copyright © 2014–2015, Texas Instruments Incorporated Submit Documentation Feedback Product Folder Links: AM5728 AM5726 |
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