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AM5728 Datasheet(PDF) 247 Page - Texas Instruments |
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AM5728 Datasheet(HTML) 247 Page - Texas Instruments |
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247 / 415 page ![]() AM5728, AM5726 www.ti.com SPRS915O – MARCH 2014 – REVISED OCTOBER 2015 even) G = (1 + 0.5 * ADVExtraDelay) * GPMC_FCLK otherwise Case GpmcFCLKDivider = 2: G = 0.5 * ADVExtraDelay * GPMC_FCLK if ((ADVOnTime – ClkActivationTime) is a multiple of 3) G = (1 + 0.5 * ADVExtraDelay) * GPMC_FCLK if ((ADVOnTime – ClkActivationTime – 1) is a multiple of 3) G = (2 + 0.5 * ADVExtraDelay) * GPMC_FCLK if ((ADVOnTime – ClkActivationTime – 2) is a multiple of 3) For ADV rising edge (ADV desactivated) in Reading mode: Case GpmcFCLKDivider = 0: G = 0.5 * ADVExtraDelay * GPMC_FCLK Case GpmcFCLKDivider = 1: G = 0.5 * ADVExtraDelay * GPMC_FCLK if (ClkActivationTime and ADVRdOffTime are odd) or (ClkActivationTime and ADVRdOffTime are even) G = (1 + 0.5 * ADVExtraDelay) * GPMC_FCLK otherwise Case GpmcFCLKDivider = 2: G = 0.5 * ADVExtraDelay * GPMC_FCLK if ((ADVRdOffTime – ClkActivationTime) is a multiple of 3) G = (1 + 0.5 * ADVExtraDelay) * GPMC_FCLK if ((ADVRdOffTime – ClkActivationTime – 1) is a multiple of 3) G = (2 + 0.5 * ADVExtraDelay) * GPMC_FCLK if ((ADVRdOffTime – ClkActivationTime – 2) is a multiple of 3) For ADV rising edge (ADV desactivated) in Writing mode: Case GpmcFCLKDivider = 0: G = 0.5 * ADVExtraDelay * GPMC_FCLK Case GpmcFCLKDivider = 1: G = 0.5 * ADVExtraDelay * GPMC_FCLK if (ClkActivationTime and ADVWrOffTime are odd) or (ClkActivationTime and ADVWrOffTime are even) G = (1 + 0.5 * ADVExtraDelay) * GPMC_FCLK otherwise Case GpmcFCLKDivider = 2: G = 0.5 * ADVExtraDelay * GPMC_FCLK if ((ADVWrOffTime – ClkActivationTime) is a multiple of 3) G = (1 + 0.5 * ADVExtraDelay) * GPMC_FCLK if ((ADVWrOffTime – ClkActivationTime – 1) is a multiple of 3) G = (2 + 0.5 * ADVExtraDelay) * GPMC_FCLK if ((ADVWrOffTime – ClkActivationTime – 2) is a multiple of 3) (8) For OE falling edge (OE activated): Case GpmcFCLKDivider = 0: - H = 0.5 * OEExtraDelay * GPMC_FCLK Case GpmcFCLKDivider = 1: - H = 0.5 * OEExtraDelay * GPMC_FCLK if (ClkActivationTime and OEOnTime are odd) or (ClkActivationTime and OEOnTime are even) - H = (1 + 0.5 * OEExtraDelay) * GPMC_FCLK otherwise Case GpmcFCLKDivider = 2: - H = 0.5 * OEExtraDelay * GPMC_FCLK if ((OEOnTime – ClkActivationTime) is a multiple of 3) - H = (1 + 0.5 * OEExtraDelay) * GPMC_FCLK if ((OEOnTime – ClkActivationTime – 1) is a multiple of 3) - H = (2 + 0.5 * OEExtraDelay) * GPMC_FCLK if ((OEOnTime – ClkActivationTime – 2) is a multiple of 3) For OE rising edge (OE desactivated): Case GpmcFCLKDivider = 0: - H = 0.5 * OEExtraDelay * GPMC_FCLK Case GpmcFCLKDivider = 1: - H = 0.5 * OEExtraDelay * GPMC_FCLK if (ClkActivationTime and OEOffTime are odd) or (ClkActivationTime and OEOffTime are even) - H = (1 + 0.5 * OEExtraDelay) * GPMC_FCLK otherwise Case GpmcFCLKDivider = 2: - H = 0.5 * OEExtraDelay * GPMC_FCLK if ((OEOffTime – ClkActivationTime) is a multiple of 3) - H = (1 + 0.5 * OEExtraDelay) * GPMC_FCLK if ((OEOffTime – ClkActivationTime – 1) is a multiple of 3) - H = (2 + 0.5 * OEExtraDelay) * GPMC_FCLK if ((OEOffTime – ClkActivationTime – 2) is a multiple of 3) (9) For WE falling edge (WE activated): Case GpmcFCLKDivider = 0: - I = 0.5 * WEExtraDelay * GPMC_FCLK Case GpmcFCLKDivider = 1: - I = 0.5 * WEExtraDelay * GPMC_FCLK if (ClkActivationTime and WEOnTime are odd) or (ClkActivationTime and WEOnTime are even) - I = (1 + 0.5 * WEExtraDelay) * GPMC_FCLK otherwise Case GpmcFCLKDivider = 2: - I = 0.5 * WEExtraDelay * GPMC_FCLK if ((WEOnTime – ClkActivationTime) is a multiple of 3) - I = (1 + 0.5 * WEExtraDelay) * GPMC_FCLK if ((WEOnTime – ClkActivationTime – 1) is a multiple of 3) - I = (2 + 0.5 * WEExtraDelay) * GPMC_FCLK if ((WEOnTime – ClkActivationTime – 2) is a multiple of 3) For WE rising edge (WE desactivated): Case GpmcFCLKDivider = 0: - I = 0.5 * WEExtraDelay * GPMC_FCLK Case GpmcFCLKDivider = 1: - I = 0.5 * WEExtraDelay * GPMC_FCLK if (ClkActivationTime and WEOffTime are odd) or (ClkActivationTime and WEOffTime are even) - I = (1 + 0.5 * WEExtraDelay) * GPMC_FCLK otherwise Case GpmcFCLKDivider = 2: - I = 0.5 * WEExtraDelay * GPMC_FCLK if ((WEOffTime – ClkActivationTime) is a multiple of 3) - I = (1 + 0.5 * WEExtraDelay) * GPMC_FCLK if ((WEOffTime – ClkActivationTime – 1) is a multiple of 3) - I = (2 + 0.5 * WEExtraDelay) * GPMC_FCLK if ((WEOffTime – ClkActivationTime – 2) is a multiple of 3) (10) J = GPMC_FCLK period, where GPMC_FCLK is the General Purpose Memory Controller internal functional clock (11) For read: K = (ADVRdOffTime – ADVOnTime) * (TimeParaGranularity + 1) * GPMC_FCLK For write: K = (ADVWrOffTime – ADVOnTime) * (TimeParaGranularity + 1) * GPMC_FCLK (12) The gpmc_clk output clock maximum and minimum frequency is programmable in the I/F module by setting the GPMC_CONFIG1_CSx configuration register bit fields GpmcFCLKDivider (13) gpio6_16 programmed to MUXMODE=9 (clkout1), CM_CLKSEL_CLKOUTMUX1 programmed to 7 (CORE_DPLL_OUT_DCLK), CM_CLKSEL_CORE_DPLL_OUT_CLK_CLKOUTMUX programmed to 1. (14) CSEXTRADELAY = 0, ADVEXTRADELAY = 0, WEEXTRADELAY = 0, OEEXTRADELAY = 0. Extra half-GPMC_FCLK cycle delay mode is not timed. Copyright © 2014–2015, Texas Instruments Incorporated Timing Requirements and Switching Characteristics 247 Submit Documentation Feedback Product Folder Links: AM5728 AM5726 |
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