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AM5728 Datasheet(PDF) 246 Page - Texas Instruments |
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AM5728 Datasheet(HTML) 246 Page - Texas Instruments |
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246 / 415 page ![]() AM5728, AM5726 SPRS915O – MARCH 2014 – REVISED OCTOBER 2015 www.ti.com Table 7-26. GPMC/NOR Flash Interface Timing Requirements - Synchronous Mode - 5 Loads NO. PARAMETER DESCRIPTION MIN MAX UNIT F12 tsu(dV-clkH) Setup time, read gpmc_ad[15:0] valid before gpmc_clk high 2.5 ns F13 th(clkH-dV) Hold time, read gpmc_ad[15:0] valid after gpmc_clk high 1.9 ns F21 tsu(waitV-clkH) Setup time, gpmc_wait[1:0] valid before gpmc_clk high 2.5 ns F22 th(clkH-waitV) Hold Time, gpmc_wait[1:0] valid after gpmc_clk high 1.9 ns Table 7-27. GPMC/NOR Flash Interface Switching Characteristics - Synchronous Mode - 5 Loads NO. PARAMETER DESCRIPTION MIN MAX UNIT F0 tc(clk) Cycle time, output clock gpmc_clk period (12) 15.04 ns F2 td(clkH-nCSV) Delay time, gpmc_clk rising edge to gpmc_cs[7:0] transition F-0.13 (6) F+6.1 (6) ns F3 td(clkH-nCSIV) Delay time, gpmc_clk rising edge to gpmc_cs[7:0] invalid E+0.7 (5) E+6.1 (5) ns F4 td(ADDV-clk) Delay time, gpmc_a[27:0] address bus valid to gpmc_clk first edge B+0.21 (2) B+6.1 (2) ns F5 td(clkH-ADDIV) Delay time, gpmc_clk rising edge to gpmc_a[27:0] gpmc address bus invalid 0.7 ns F6 td(nBEV-clk) Delay time, gpmc_ben[1:0] valid to gpmc_clk rising edge B-4.9 (2) B+0.4 (2) ns F7 td(clkH-nBEIV) Delay time, gpmc_clk rising edge to gpmc_ben[1:0] invalid D-0.4 (4) D+4.9 (4) ns F8 td(clkH-nADV) Delay time, gpmc_clk rising edge to gpmc_advn_ale transition G+0.7 (7) G+6.1 (7) ns F9 td(clkH-nADVIV) Delay time, gpmc_clk rising edge to gpmc_advn_ale invalid D+0.7 (4) D+6.1 (4) ns F10 td(clkH-nOE) Delay time, gpmc_clk rising edge to gpmc_oen_ren transition H+0.42 (8) H+5.1 (8) ns F11 td(clkH-nOEIV) Delay time, gpmc_clk rising edge to gpmc_oen_ren invalid E+0.7 (5) E+5.1 (5) ns F14 td(clkH-nWE) Delay time, gpmc_clk rising edge to gpmc_wen transition I+0.46 (9) I+6.1 (9) ns F15 td(clkH-Data) Delay time, gpmc_clk rising edge to gpmc_ad[15:0] data bus transition J-0.4 (10) J+4.9 (10) ns F17 td(clkH-nBE) Delay time, gpmc_clk rising edge to gpmc_ben[1:0] transition J-0.4 (10) J+5.63 ns (10) F18 tw(nCSV) Pulse duration, gpmc_cs[7:0] low A (1) ns F19 tw(nBEV) Pulse duration, gpmc_ben[1:0] low C (3) ns F20 tw(nADVV) Pulse duration, gpmc_advn_ale low K (11) ns F23 td(CLK-GPIO) Delay time, gpmc_clk transition to gpio6_16 transition (13) 0.96 6.1 ns (1) For single read: A = (CSRdOffTime - CSOnTime) * (TimeParaGranularity + 1) * GPMC_FCLK period For burst read: A = (CSRdOffTime - CSOnTime + (n - 1) * PageBurstAccessTime) * (TimeParaGranularity + 1) * GPMC_FCLK period For burst write: A = (CSWrOffTime - CSOnTime + (n - 1) * PageBurstAccessTime) * (TimeParaGranularity + 1) * GPMC_FCLK period with n the page burst access number. (2) B = ClkActivationTime * GPMC_FCLK (3) For single read: C = RdCycleTime * (TimeParaGranularity + 1) * GPMC_FCLK For burst read: C = (RdCycleTime + (n – 1) * PageBurstAccessTime) * (TimeParaGranularity + 1) * GPMC_FCLK For Burst write: C = (WrCycleTime + (n – 1) * PageBurstAccessTime) * (TimeParaGranularity + 1) * GPMC_FCLK with n the page burst access number. (4) For single read: D = (RdCycleTime – AccessTime) * (TimeParaGranularity + 1) * GPMC_FCLK For burst read: D = (RdCycleTime – AccessTime) * (TimeParaGranularity + 1) * GPMC_FCLK For burst write: D = (WrCycleTime – AccessTime) * (TimeParaGranularity + 1) * GPMC_FCLK (5) For single read: E = (CSRdOffTime – AccessTime) * (TimeParaGranularity + 1) * GPMC_FCLK For burst read: E = (CSRdOffTime – AccessTime) * (TimeParaGranularity + 1) * GPMC_FCLK For burst write: E = (CSWrOffTime – AccessTime) * (TimeParaGranularity + 1) * GPMC_FCLK (6) For nCS falling edge (CS activated): Case GpmcFCLKDivider = 0 : F = 0.5 * CSExtraDelay * GPMC_FCLK Case GpmcFCLKDivider = 1: F = 0.5 * CSExtraDelay * GPMC_FCLK if (ClkActivationTime and CSOnTime are odd) or (ClkActivationTime and CSOnTime are even) F = (1 + 0.5 * CSExtraDelay) * GPMC_FCLK otherwise Case GpmcFCLKDivider = 2: F = 0.5 * CSExtraDelay * GPMC_FCLK if ((CSOnTime – ClkActivationTime) is a multiple of 3) F = (1 + 0.5 * CSExtraDelay) * GPMC_FCLK if ((CSOnTime – ClkActivationTime – 1) is a multiple of 3) F = (2 + 0.5 * CSExtraDelay) * GPMC_FCLK if ((CSOnTime – ClkActivationTime – 2) is a multiple of 3) (7) For ADV falling edge (ADV activated): Case GpmcFCLKDivider = 0 : G = 0.5 * ADVExtraDelay * GPMC_FCLK Case GpmcFCLKDivider = 1: G = 0.5 * ADVExtraDelay * GPMC_FCLK if (ClkActivationTime and ADVOnTime are odd) or (ClkActivationTime and ADVOnTime are 246 Timing Requirements and Switching Characteristics Copyright © 2014–2015, Texas Instruments Incorporated Submit Documentation Feedback Product Folder Links: AM5728 AM5726 |
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