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AM5728 Datasheet(PDF) 272 Page - Texas Instruments

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Part # AM5728
Description  AM572x SitaraTM Processors
PDF  415 Pages
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Manufacturer  TI [Texas Instruments]
Direct Link  http://www.ti.com
Logo TI - Texas Instruments

AM5728 Datasheet(HTML) 272 Page - Texas Instruments

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3
2
Start
Bit
Data Bits
UARTi_TXD
5
Data Bits
Bit
Start
4
UARTi_RXD
AM5728, AM5726
SPRS915O – MARCH 2014 – REVISED OCTOBER 2015
www.ti.com
(1) U = UART baud time = 1/programmed baud rate
(2) P = Clock period of the reference clock (FCLK, usually 48 MHz or 192MHz).
Table 7-41. Switching Characteristics Over Recommended Operating Conditions for UART
NO.
PARAMETER
DESCRIPTION
MIN
MAX
UNIT
15 pF
12
f(baud)
Maximum programmable baud rate
30 pF
0.23
MHz
100 pF
0.115
2
tw(TX)
Pulse width, transmit data bit, 15/30/100 pF high or low
U - 2(1)
U + 2(1)
ns
3
tw(RTS)
Pulse width, transmit start bit, 15/30/100 pF high or low
U - 2(1)
U + 2(1)
ns
(1) U = UART baud time = 1/programmed baud rate
Figure 7-32. UART Timing
7.15 Multichannel Serial Peripheral Interface (MCSPI)
The MCSPI is a master/slave synchronous serial bus. There are four separate MCSPI modules (SPI1,
SPI2, SPI3, and SPI4) in the device. All these four modules support up to four external devices (four chip
selects) and are able to work as both master and slave.
The MCSPI modules include the following main features:
•
Serial clock with programmable frequency, polarity, and phase for each channel
•
Wide selection of SPI word lengths, ranging from 4 to 32 bits
•
Up to four master channels, or single channel in slave mode
•
Master multichannel mode:
–
Full duplex/half duplex
–
Transmit-only/receive-only/transmit-and-receive modes
–
Flexible input/output (I/O) port controls per channel
–
Programmable clock granularity
–
SPI configuration per channel. This means, clock definition, polarity enabling and word width
•
Power management through wake-up capabilities
•
Programmable timing control between chip select and external clock generation
•
Built-in FIFO available for a single channel.
•
Each SPI module supports multiply chip select pins spim_cs[i], whete i = 1 to 4.
NOTE
For more information, see the Serial Communication Interface section of the device TRM.
272
Timing Requirements and Switching Characteristics
Copyright © 2014–2015, Texas Instruments Incorporated
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Product Folder Links: AM5728 AM5726



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