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TLS820F0 Datasheet(PDF) 32 Page - Infineon Technologies AG |
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TLS820F0 Datasheet(HTML) 32 Page - Infineon Technologies AG |
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32 / 41 page ![]() Data Sheet 32 Rev. 1.1, 2015-07-27 TLS820F0 Block Description and Electrical Characteristics Figure 11 Watchdog Output behavior for Watchdog deactivation by current control Scenario “A” In scenario “A” the watchdog logic expects a next trigger at WI pin within the WD-trigger time t WI,tr. This state is interrupted by the low current load state ( I Q ≤ IQ,W,deact). During this state, the watchdog is disabled. The watchdog output signal “WO” will stay high while the watchdog is disabled. After leaving the low current load state ( I Q ≥ IQ,W,act), an ignore window tWI,i follows. After this, the watchdog trigger time tWI,tr starts based on the setting of the DT pins. This behavior is defined for cases with a low current load time greater than t WO,low. Scenario “B” In scenario “B” the watchdog is not served within WD-trigger time t WI,tr with an trigger event at WI pin. As a result the “WO” is set to low. This state is interrupted by the low current load state ( I Q ≤ IQ,W,deact). During this state, the watchdog is disabled. The watchdog output signal “WO” is kept in low state for t WO,low and then the “WO” is set to high. After leaving the low current load state ( I Q ≥ IQ,W,act), an ignore window tWI,i follows. After this, the watchdog trigger time t WI,tr starts based on the setting of the DT pins. This behavior is defined for cases with a low current load time greater than t WO,low. Scenario “C” In scenario “C” the watchdog is not served within WD-trigger time t WI,tr with an trigger event at WI pin. As a result the “WO” is set to low. After this an ignore window follows. This state is interrupted by the low current load state ( I Q ≤ IQ,W,deact). During this state, the watchdog is disabled. The watchdog output signal “WO” will stay high while the watchdog is disabled. After leaving the low current load state ( I Q ≥ IQ,W,act), an ignore window tWI,i follows. After this, the watchdog trigger time t WI,tr starts based on the setting of the DT pins. This behavior is defined for cases with a low current load time greater than t WO,low. Scenario “D” In scenario “D” the watchdog is not served within WD-trigger time t WI,tr with a trigger event at WI pin. As a result the “WO” is set to low. This state is interrupted by the low current load state ( I Q ≤ IQ,W,deact). During this state, the watchdog is disabled. The watchdog output signal “WO” is kept in low state for the time of low current load state. After leaving the low current load state ( I Q ≥ IQ,W,act), an ignore window tWI,i follows. After this, the watchdog trigger time t WI,tr starts based on the setting of the DT pins. This behavior is defined for cases with a low current load time less than t WO,low. t IQ IQ,W,act IQ,W,deact t VWO >tWO,low Scenario „A“ WD-trigger time tWI,tr *) WD disabled ignore time tWI,i WD-trigger time tWI,tr t VWO Scenario „B“ WD-trigger time tWI,tr ignore time tWI,i WD-trigger time tWI,tr tWO,low t VWO Scenario „C“ WD-trigger time tWI,tr ignore time tWI,i WD-trigger time tWI,tr tWO,low WD disabled t IQ IQ,W,act IQ,W,deact t VWO <tWO,low Scenario „D“ WD-trigger time tWI,tr ignore time tWI,i WD-trigger time tWI,tr tWO,low *) WD disabled WD disabled *) interrupted by entering in „Watchdog deactivation by current control“ Watchdog filter time tW,IQ,filter |
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