 |
Electronic Components Datasheet Search |
|
|
Electronic Components Datasheet Search |
|
A13 Datasheet(PDF) 34 Page - List of Unclassifed Manufacturers |
|
|
|||||||||||||||||||||||||||||
A13 Datasheet(HTML) 34 Page - List of Unclassifed Manufacturers |
|
|
34 / 55 page  Allwinner Technology CO., Ltd. A13 Datasheet v1.30 Copyright © 2012 Allwinner Technology. All Rights Reserved. 33 December 10, 2012 10. Interrupt Controller 10.1. Overview The interrupt controller features: Control the nIRQ and FIQ of a RISC Processor 4-Level Priority Controller External Sources of Edge-sensitive or Level-sensitive Since the 4-level Priority Controller allows users to define the priority of each interrupt source, so higher priority interrupts can be serviced even if a lower priority interrupt is being treated. 11. DMA Controller 11.1. Overview There are two kinds of DMA in the chip. One is Normal DMA with 8 channels, and the other is Dedicated DMA with 8 channels. For normal DMA, only one channel can be active and the sequence is in accordance with the priority level. As for the dedicated DMA, at most 8-channel can be active at the same time if their source or destination does not conflict. |
|
Link URL |
| Does ALLDATASHEET help your business so far? [ DONATE ] |
About Alldatasheet | Advertisement | Contact us | Privacy Policy | Link to Datasheet | Link Exchange | Manufacturer List All Rights Reserved©Alldatasheet.com |
| Russian : Alldatasheetru.com | Korean : Alldatasheet.co.kr | Spanish : Alldatasheet.es | French : Alldatasheet.fr | Italian : Alldatasheetit.com Portuguese : Alldatasheetpt.com | Polish : Alldatasheet.pl | Vietnamese : Alldatasheet.vn Indian : Alldatasheet.in | Mexican : Alldatasheet.com.mx | British : Alldatasheet.co.uk | New Zealand : Alldatasheet.co.nz |
|
Family Site : ic2ic.com |
icmetro.com |
English ▼
English
Chinese
German
Japanese
Russian
Korean
Spanish
French
Italian
Portuguese
Polish
Vietnamese
Indian
Mexican
British
New Zealand
