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MT9075AP Datasheet(PDF) 1 Page - Mitel Networks Corporation |
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MT9075AP Datasheet(HTML) 1 Page - Mitel Networks Corporation |
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1 / 78 page  4-129 MT9075A E1 Single Chip Transceiver Features • Combined PCM 30 framer, Line Interface Unit (LIU) and link controllers in a 68 pin PLCC or 100 pin MQFP package • Selectable bit rate data link access with optional Sa bits HDLC controller (HDLC0) and channel 16 HDLC controller (HDLC1) • Enhanced performance monitoring and programmable error insertion functions • Low jitter DPLL for clock generation • Operating under synchronized or free run mode • Two-frame receive elastic buffer with controlled slip direction indication • Selectable transmit or receive jitter attenuator • Intel or Motorola non-multiplexed parallel microprocessor interface • CRC-4 updating algorithm for intermediate path points of a message-based data link application • ST-BUS/GCI 2.048 Mbit/s backplane bus for both data and signalling. Applications • E1 add/drop multiplexers and channel banks • CO and PBX equipment interfaces • Primary Rate ISDN nodes • Digital Cross-connect Systems (DCS) Description The MT9075A is a single chip device which integrates an advanced PCM 30 framer with a Line Interface Unit (LIU). The framer interfaces to a 2.048 Mbit/s backplane and provides selectable rate data link access with optional HDLC controllers for Sa bits and channel 16. The LIU interfaces the framer functions to the PCM 30 transformer-isolated four wire line. The MT9075A meets or supports the latest ITU-T Recommendations including G.703, G.704, G.706, G.732, G.775, G.796, G.823 for PCM 30, and I.431 for ISDN primary rate. It also meets or supports ETSI ETS 300 166 and BS 6450. Figure 1 - Functional Block Diagram ST-BUS Interface CAS Buffer ST Loop PL Loop National DG Loop Alarm Detection, 2 Frame Slip Buffer ST-BUS Interface TAIS Line Driver TTIP OSC1 OSC2 RTIP M/S CSTi DSTi CSTo DSTo E2o RRING TRING Bit Buffer F0b C4b RxMF LOS TxMF Transmit Framing, Error and Test Signal Generation Data Link, HDLC0, HDLC1 Receive Framing, Performance Monitoring, RxDLCLK RxDL TxDL TxDLCLK R/W/WR CS DS/RD IRQ D7~D0 ~AC0 RxFP/Rx64kCK Jitter Attenuator & Clock Control AC4 Tdi Tdo Tms Tclk Trst MS/FR ISSUE 5 December 1997 Preliminary Information Ordering Information MT9075AP 68Pin PLCC MT9075AL 100 Pin MQFP -40 °C to 85°C |
Similar Part No. - MT9075AP |
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Similar Description - MT9075AP |
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