S

P

Data Byte 2

D8

D9

D10 D11 D12 D13 D14 D15

S

P

Data Byte 1

D0

D1

D2

D3

D4

D5

D6

D7

P

S

P

0

1

0

1

P0

P1

P2

P3

P

S

P

G/nI

C/nA

=1

R/nW

C0

C1

C2

C3

C4

P

S

P

A0

A1

A2

A3

A4

P

C/nA

=0

Command Phase

Address Phase

TMP107

SBOS716B – MAY 2015 – REVISED SEPTEMBER 2015

www.ti.com

7.3.3.1.2.2

Read/Write (R/nW) Bit

The R/nW bit indicates whether the operation is read or write to the TMP107 device.

7.3.3.1.2.3

Command or Address (C/nA) Bit:

The C/nA bit indicates whether the current communication is a command operation or address operation. The

C/nA bit = 1 indicates a command operation. The codes for specific commands in the TMP107 are listed in

Table 2. Codes other than those listed in Table 2 are reserved for factory use only.

The C/nA bit = 0 indicates an address operation. The five bits following the C/nA bit (A4 to A0) are the address

bits of the device or devices that the host intends to communicate with in the chain, as shown in Figure 20.

Figure 20. Command and Address Phase

7.3.3.1.3

Register Pointer Phase

The register pointer phase is provided only if the communication is an address operation. This phase of the

communication shows the register pointer of the device that the host in going to write to or read from. The pointer

byte has special identification code bits, as shown in Figure 21.

Figure 21. Register Pointer Phase

7.3.3.1.4

Data Phase

The data phase is the last phase of communication. Every register location consists of two words of data.

Therefore, this last phase of communication consists of at least two bytes of data with the least significant byte

sent first, followed by the most significant byte.

For a write operation, the host sends data to the device or devices at the specified register pointer location.

For a read operation, the specified device or devices respond back with the data from the location specified in

the register pointer phase.

Depending on the value of G/nI bit in the command and address phase, the data in this phase are either written

to a targeted individual device, or to multiple devices in the daisy-chain. Individual and global read or write

operations are explained in more detail in subsequent sections. Figure 22 shows a diagram of the data phase.

Figure 22. Data Phase for an Individual Read or Write Scenario

16

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