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POWERSTEP01 Datasheet(PDF) 37 Page - STMicroelectronics |
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POWERSTEP01 Datasheet(HTML) 37 Page - STMicroelectronics |
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37 / 92 page ![]() DocID025022 Rev 5 37/92 powerSTEP01 Functional description 92 7.20 BUSY/SYNC pin This pin is an open-drain output which can be used as busy flag or synchronization signal according to the SYNC_EN bit value (STEP_MODE register) (see Section 11.1.23 on page 61). 7.21 FLAG pin By default, an internal open-drain transistor pulls the FLAG pin to ground when at least one of the following conditions occurs: Power-up or standby/reset exit Stall detection on bridge A Stall detection on bridge B Overcurrent detection Thermal warning Thermal shutdown UVLO UVLO on ADC input Switch turn-on event Command error It is possible to mask one or more alarm conditions by programming the ALARM_EN register (see Table 32 on page 63). If the corresponding bit of the ALARM_EN register is low, the alarm condition is masked and it does not cause a FLAG pin transition; all other actions imposed by alarm conditions are performed anyway. In case of daisy chain configuration, FLAG pins of different ICs can be or-wired to save host controller GPIOs. |
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