ADM1260 datasheet(67/71 Pages) AD

67 / 71 page

Data Sheet

ADM1260

Rev. 0 | Page 67 of 71

BLACK BOX STATUS REGISTERS AND FAULT

RECORDS

Each time the ADM1260 SE changes state, the contents of the

UVSTATx, OVSTATx, LIMSTATx, and GPISTATx registers,

along with some other pieces of information relating to the SE

state and the cause of the last state transition, are latched into

seven black box status registers.

These registers provide a snapshot of the state of the inputs

being monitored by the ADM1260, what the last state was, and

what caused the last state change.

After the SE changes state, if the new state it enters has its

corresponding STATEx bit set (see the BBWRTRGx registers),

the seven black box status registers are written sequentially into

the next available location in the black box EEPROM section.

After the seven bytes are written, an eighth checksum byte is

written to provide a method to check data integrity. This check

is important if only a partial record is written because all the

supplies powering the device failed.

The checksum byte is a simple addition of the values written

into the seven other EEPROM location for a given fault record.

The order of the bytes in a fault record stored in EEPROM is as

follows:

PREVSTEXT

PREVSEQST

BBSTAT1

BBSTAT2

BBSTAT3

BBSTAT4

BBSTAT5

CHECKSUM

The bytes are stored from lowest to the highest EEPROM address;

therefore, for the first fault record location in the black box

EEPROM, PREVSTEXT is stored at 0xF980 and CHECKSUM at

0xF987.

Table 31. Black Box Fault and Status Registers1

Address

Name

Bits

Bit Name

R/W

Description

0xEA

PREVSTEXT

BBUSED

N/A

This bit always reads as 0. When this bit is written to the first byte of a fault

record in EEPROM, it marks all eight bytes in use. When the black box is searching

for the next free location to use, this bit is examined. If this bit is 0, then even if

the previous fault record is only partially written to EEPROM, the eight bytes of

the fault record are ignored.

ICBMSG

This bit indicates that the previous state transition was triggered by a message

received on the ICB.

SMBJUMP

This bit indicates that the previous state transition was due to an SMB jump

being received.

LIMWARN

This bit indicates that the previous state transition was due to one or more ADC

warning limits being exceeded.

SFDCMP

This bit indicates that the previous state transition was due to one or more

supply fault detector limits being exceeded.

Timeout

This bit indicates that the previous state transition was due to the timeout

condition becoming true.

Monitor

This bit indicates that the previous state transition was due to the monitor

condition becoming true.

Sequence

This bit indicates that the previous state transition was due to the sequence

condition becoming true.

0xEB

PREVSEQST

[5:0]

PREVADDR

State number of the state that was active immediately prior to the current state.

0xEC

BBSTAT1

UV_VX3

Undervoltage threshold exceeded on VX3 (SFD) or VP3 (warning).

UV_VX2

Undervoltage threshold exceeded on VX2 (SFD) or VP2 (warning).

UV_VX1

Undervoltage threshold exceeded on VX1 (SFD) or VP1 (warning).

UV_VH

Undervoltage threshold exceeded on the VH SFD.

UV_VP4

Undervoltage threshold exceeded on the VP4 SFD.

UV_VP3

Undervoltage threshold exceeded on the VP3 SFD.

UV_VP2

Undervoltage threshold exceeded on the VP2 SFD.

UV_VP1

Undervoltage threshold exceeded on the VP1 SFD.

ADM1260 Datasheet(PDF) 67 Page - Analog Devices

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