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FT810Q Datasheet(PDF) 38 Page - Future Technology Devices International Ltd. |
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FT810Q Datasheet(HTML) 38 Page - Future Technology Devices International Ltd. |
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38 / 60 page ![]() Copyright © 2015 Future Technology Devices International Limited 38 Document No.: FT_001165 FT81X Embedded Video Engine Datasheet Version 1.2 Clearance No.: FTDI#440 4.8.3.5 Wake up to ACTIVE from other power states When in the POWER DOWN state, if the device enters this state via an SPI command, then only the SPI ACTIVE command will bring the device back to the ACTIVE state, provided PD_N pin is also high. However, if PD_N is used instead, then making PD_N high followed by a SPI ACTIVE command will wake up the device. Upon exiting this state, the device will perform a global reset, and will go through the same power up sequence. All settings from SPI commands will be reset except those that pertain to pin states during power down. The clock enable sequence mentioned in section 4.2.3 shall be executed to properly select and enable the system clock. From the SLEEP state, the host MPU sends an SPI ACTIVE command to wake the FT81x into the ACTIVE state. The host needs to wait for at least 20ms before accessing any registers or commands. This is to guarantee the clock oscillator and PLL are up and stable. From the STANDBY state, the host MPU sends SPI ACTIVE command to wake the FT81x into the ACTIVE state. The host can immediately access any register or command. 4.8.4 Reset and boot-up sequence There are a few hardware and software reset events which can be triggered to reset the FT81x. Hardware reset events: Power-on-Reset(POR) Toggle the PD_N pin Software reset events: SPI command RST_PULSE SPI command to switch between the internal clock and the external clock SPI command to enter POWERDOWN then wakeup After reset the FT81x will be in the SLEEP state. Upon receiving an SPI ACTIVE command, the internal oscillator and PLL will start up. Once the clock is stable, the chip will check and repair its internal RAM, running the configuration and release the clock to the system. The chip will exit the reset and boot-up state and enter into normal operations. The boot-up may take up to 300ms to complete. 4.8.5 Pin Status at Different Power States The FT81x pin status depends on the power state of the chip. See the following table for more details. At the power transition from ACTIVE to STANDBY or ACTIVE to SLEEP, all pins retain their previous status. The software needs to set AUDIO_L, BACKLIGHT to a known state before issuing power transition commands. The pin status in the power down state can be changed by SPI command PIN_PD_STATE. Table 4-20 Pin Status Pin Name Default Drive Reset Normal Power Down (Default) AUDIO_L 20mA Out, Float Out Pull Low SCK - In In In MISO 5mA Out, Float (CS_N = 1) IO Out, Float MOSI 5mA In IO In CS_N - In In In |
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