DP83843 datasheet(7/87 Pages) NSC

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1.0 Pin Descriptions (Continued)

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FXRD-/AUIRD-

FXRD+/AUIRD+

(PECL

AUI)

100BASE-FX or 10 Mb/s AUI RECEIVE DATA: This configurable input buff-

er supports either 125 Mb/s PECL, for 100BASE-FX applications, or 10 Mb/s

AUI signaling.

When configured as a 100BASE-FX receiver this input accepts 100BASE-FX

standard compliant binary data direct from an optical transceiver. This differ-

ential input is enabled only during 100BASE-FX device configuration (see the

pin definition for FXEN).

When configured as an AUI buffer this input receives AUI compatible

Manchester data to support typical 10BASE2 or 10BASE5 products.

FXSD-/CD-

FXSD+/CD+

(PECL

AUI)

SIGNAL DETECT or AUI COLLISION DETECT: This configurable input buff-

er supports either 125 Mb/s PECL, for 100BASE-FX applications, or 10 Mb/s

AUI signaling.

When configured as a 100BASE-FX receiver this input accepts indication

from the 100BASE-FX PMD transceiver upon detection of a receive signal

from the fiber media. This pin is only active during 100BASE-FX opera-

tion(see the pin definition for FXEN).

When configured as an AUI buffer this input receives AUI compatible

Manchester data to support typical 10BASE2 or 10BASE5 products.

THIN

(REPEATER)

I/O, Z

THIN AUI MODE: This output allows for control of an external CTI coaxial

transceiver connected through the AUI. This pin is controlled by writing to bit

3 of the 10BTSCR register (address 18h). The THIN pin may also be used as

a user configurable output control pin.

TXAR100

(current

reference)

100 Mb/s TRANSMIT AMPLITUDE REFERENCE CONTROL: Reference

current allowing adjustment of the TPTD

+/− output amplitude during

100BASE-TX operation.

By placing a resistor between this pin and ground or VCC, a reference current

is set up which dictates the output amplitude of the 100BASE-TX MLT-3

transmit signal. Connecting a resistor to VCC will increase the transmit ampli-

tude while connecting a resistor to ground will decrease the transmit ampli-

tude. While the value of the resistor should be evaluated on a case by case

bases, the DP83843 was designed to produce an amplitude close to the re-

quired range of 2V pk-pk differential

± 5% as measured across TD+/− while

driving a typical 100

Ω differential load without a resistor connected to this pin.

Therefore this pin is allowed to float in typical applications.

This current reference is only recognized during 100BASE-TX operation and

has no effect during100BASE-FX,10BASE-T, or AUI modes of operation.

TWREF

TWISTER REFERENCE RESISTOR: External reference current adjustment,

via a resistor to TW_AGND, which controls the TP-PMD receiver equalization

levels. The value of this resistor is 70k

± 1%.

BGREF

(current

reference)

BANDGAP REFERENCE: External current reference resistor for internal

bandgap circuitry. The value of this resistor is 4.87k

± 1%.

VCM_CAP

COMMON MODE BYPASS CAPACITOR: External capacitor to improve

common mode filtering for the receive signal. It is recommended that a

.00

33µF in parallel with a .10µF capacitor be used, see Figure 23.

Signal Name

Type

Pin #

Description

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