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AD9864 Datasheet(PDF) 8 Page - Analog Devices

Part # AD9864
Description  IF Digitizing Subsystem
PDF  44 Pages
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Manufacturer  AD [Analog Devices]
Direct Link  http://www.analog.com
Logo AD - Analog Devices

AD9864 Datasheet(HTML) 8 Page - Analog Devices

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AD9864
PIN CONFIGURATION AND FUNCTIONAL DESCRIPTIONS
PIN 1
IDENTIFIER
TOP VIEW
(Not to Scale)
AD9864
1
MXOP
36
GNDL
2
MXON
35
FREF
3
GNDF
34
GNDS
4
IF2N
33
SYNCB
5
IF2P
32
GNDH
6
VDDF
31
FS
7
GCP
30
DOUTB
8
GCN
29
DOUTA
9
VDDA
28
CLKOUT
10
GNDA
27
VDDH
11
VREFP
26
VDDD
12
VREFN
25
PE
48
13
42
19
43
18
44
17
45
16
46
15
47
14
41
20
40
21
39
22
38
23
37
24
Figure 2. 48-Lead LFCSP, Backside Paddle Contact Is Connected to Ground
Table 5. Pin Function Descriptions—48-Lead Lead Frame Chip Scale Package (LFCSP)
Pin No.
Mnemonic
Description
1
MXOP
Mixer Output, Positive
2
MXON
Mixer Output, Negative
3
GNDF
Ground for Front End of ADC
4
IF2N
Second IF Input (to ADC), Negative
5
IF2P
Second IF Input (to ADC), Positive
6
VDDF
Positive Supply for Front End of ADC
7
GCP
Filter Capacitor for ADC Full-Scale
Control
8
GCN
Full-Scale Control Ground
9
VDDA
Positive Supply for ADC Back End
10
GNDA
Ground for ADC Back End
11
VREFP
Voltage Reference, Positive
12
VREFN
Voltage Reference, Negative
13
RREF
Reference Resistor: Requires 100 k
Ω to
GNDA
14
VDDQ
Positive Supply for Clock Synthesizer
15
IOUTC
Clock Synth Charge Pump Out Current
16
GNDQ
Ground for Clock Synthesizer Charge
Pump
17
VDDC
Positive Supply for Clock Synthesizer
18
GNDC
Ground for Clock Synthesizer
19
CLKP
Sampling Clock Input/Clock VCO Tank,
Positive
20
CLKN
Sampling Clock Input/Clock VCO Tank,
Negative
21
GNDS
Substrate Ground
22
GNDD
Ground for Digital Functions
23
PC
Clock Input for SPI Port
24
PD
Data I/O for SPI Port
25
PE
Enable Input for SPI Port
26
VDDD
Positive Supply for Internal Digital
Pin No.
Mnemonic
Description
27
VDDH
Positive Supply for Digital Interface
28
CLKOUT
Clock Output for SSI Port
29
DOUTA
Data Output for SSI Port
30
DOUTB
Data Output for SSI Port (Inverted) or
SPI Port
31
FS
Frame Sync for SSI Port
32
GNDH
Ground for Digital Interface
33
SYNCB
Resets SSI and DecimatorCounters;
Active Low
34
GNDS
Substrate Ground
35
FREF
Reference Frequency Input for Both
Synthesizers
36
GNDL
Ground for LO Synthesizer
37
GNDP
Ground for LO Synthesizer Charge
Pump
38
IOUTL
LO Synthesizer Charge Pump Out
Current
39
VDDP
Positive Supply for LO Synthesizer
Charge Pump
40
VDDL
Postive Supply for LO Synthesizer
41
CXVM
External Filter Capacitor; DC Output of
LNA
42
LON
LO Input to Mixer and LO Synthesizer,
Negative
43
LOP
LO Input to Mixer and LO Synthesizer,
Positive
44
CXVL
External Bypass Capacitor for LNA
Power Supply
45
GNDI
Ground for Mixer and LNA
46
CXIF
External Capacitor for Mixer V-I
Converter Bias
47
IFIN
First IF Input (to LNA)
48
VDDI
Positive Supply for LNA and Mixer
Rev. 0 | Page 8 of 44



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