AD9864 datasheet(37/44 Pages) AD

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AD9864

70.5

70.0

–50

–70

–60

–90

–80

71.0

LO FREQUENCY (MHz)

Figure 68. Expanded View from 70 MHz to 71 MHz

–40

–20

–80

–60

100

IF FREQUENCY (MHz)

–120

–100

D =

fCLK/4 = 4.5MHz

DESIRED

RESPONSES

Figure 69. Response of AD9864 to a –20 dBm IF Input when fLO = 71.1 MHz

SPURIOUS RESPONSES

The spectral purity of the LO (including its phase noise) is an

important consideration since LO spurs can mix with unde-

sired signals present at the AD9864’s IFIN input to produce an

in-band response. To demonstrate the low LO spur level intro-

duced within the AD9864, Figure 69 plots the demodulated

output power as a function of the input IF frequency for an LO

frequency of 71.1 MHz and a clock frequency of 18 MHz.

The two large –10 dBFS spikes near the center of the plot are

the desired responses at fLO, ± fIF2_ADC, where fIF2_ADC = fCLK/8, i.e.,

at 68.85 MHz and 73.35 MHz. LO spurs at fLO ± fSPUR would

result in spurious responses at offsets of ± fSPUR around the

desired responses. Close-in spurs of this kind are not visible on

the plot, but small spurious responses at fLO ± fIF2_ADC ± fCLK, i.e.,

at 50.85 MHz, 55.35 MHz, 86.85 MHz, and 91.35 MHz, are

visible at the –90 dBFS level. This data indicates that the

AD9864 does an excellent job of preserving the purity of the LO

signal.

Figure 69 can also be used to gauge how well the AD9864

rejects undesired signals. For example, the half-IF response (at

69.975 MHz and 72.225 MHz) is approximately –100 dBFS,

giving a selectivity of 90 dB for this spurious response. The

largest spurious response at approximately –70 dBFS occurs

with input frequencies of 70.35 MHz and 71.85 MHz. These

spurs result from third order nonlinearity in the signal path

(i.e., abs [3 × fLO – 3 × fIF_INPUT] = fCLK /8).

EXTERNAL PASSIVE COMPONENT REQUIREMENTS

Figure 70 shows an example circuit using the AD9864 and

Table 19 shows the nominal dc bias voltages seen at the differ-

ent pins. The purpose is to show the various external passive

components required by the AD9864, along with nominal dc

voltages for troubleshooting purposes.

MXOP

MXON

GNDF

IF2N

IF2P

VDDF

GCP

GCN

VDDA

GNDA

VREFP

VREFN

GNDL

FREF

GNDS

SYNCB

GNDH

DOUTB

DOUTA

CLKOUT

VDDH

VDDD

48 47 46 45 44 43 42 41 40 39 38 37

13 14 15 16 17 18 19 20 21 22 23 24

AD9864

Ω

180pF

100pF

100

2.2nF

100pF

10nF

100pF

100k

Ω

10nF

Figure 70. Example Circuit Showing Recommended Component Values

Table 19. Nominal DC Bias Voltages

Pin Number

Mnemonic

Nominal DC Bias (V)

MXOP

VDDI – 0.2

MXON

VDDI – 0.2

IF2N

1.3 – 1.7

IF2P

1.3 – 1.7

VREFP

VDDA/2 + 0.250

VREFN

VDDA/2 – 0.250

RREF

1.2

CLKP

VDDC – 1.3

CLKN

VDDC – 1.3

FREF

VDDC/2

CXVM

1.6 – 2.0

LON

1.65 – 1.9

LOP

1.65 – 1.9

CXVL

VDDI – 0.05

CXIF

1.6 – 2.0

IFIN

0.9 – 1.1

Rev. 0 | Page 37 of 44

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