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WM8962B Datasheet(PDF) 209 Page - Wolfson Microelectronics plc |
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WM8962B Datasheet(HTML) 209 Page - Wolfson Microelectronics plc |
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209 / 295 page  WM8962 Rev 4.3 209 REGISTER BITS BY ADDRESS REGISTER ADDRESS BIT LABEL DEFAULT DESCRIPTION R0 (00h) Left Input volume 8 IN_VU 0 Input PGA Volume and Mute Update Writing a 1 to this bit will cause the INL and INR volume and mute settings to be updated simultaneously 7 INPGAL_MUTE 1 Left input PGA Mute 0 = Unmuted 1 = Muted 6 INL_ZC 0 INL PGA Zero Cross Detector 0 = Change gain immediately 1 = Change gain on zero cross only 5:0 INL_VOL [5:0] 01_1111 Left input PGA Volume -23.25dB to +24.00dB in 0.75dB steps. Register 00h Left Input volume REGISTER ADDRESS BIT LABEL DEFAULT DESCRIPTION R1 (01h) Right Input volume 15:12 CUST_ID [3:0] 0000 Reading from this register will indicate the Customer ID. 11:9 CHIP_REV [2:0] 011 Reading from this register will indicate the Chip Revision ID. 000 = Rev A 001 = Rev B 010 = Rev C 011 = Rev D 8 IN_VU 0 Input PGA Volume and Mute Update Writing a 1 to this bit will cause the INL and INR volume and mute settings to be updated simultaneously 7 INPGAR_MUTE 1 Right input PGA Mute 0 = Unmuted 1 = Muted 6 INR_ZC 0 INR PGA Zero Cross Detector 0 = Change gain immediately 1 = Change gain on zero cross only 5:0 INR_VOL [5:0] 01_1111 Right input PGA Volume -23.25dB to +24.00dB in 0.75dB steps. Register 01h Right Input volume REGISTER ADDRESS BIT LABEL DEFAULT DESCRIPTION R2 (02h) HPOUTL volume 8 HPOUT_VU 0 Headphone Output PGA Volume and Mute Update. Writing 1 to this bit will cause the HPOUTL and HPOUTR volume and mute settings to be updated simultaneously. 7 HPOUTL_ZC 0 HPOUTL_VOL (Left Headphone Output PGA) Zero Cross Enable 0 = Zero cross disabled 1 = Zero cross enabled 6:0 HPOUTL_VOL [6:0] 000_0000 Left Headphone Output PGA Volume 000_0000 to 010_1111 = Mute 011_0000 to 011_0101 = -68dB 011_0110 = -67dB …in 1dB steps 111_1001 = 0dB … 111_1111 = +6dB Register 02h HPOUTL volume |
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