| Electronic Components Datasheet Search |
|
PC87393 Datasheet(PDF) 113 Page - National Semiconductor (TI) |
|
|
|
|||||||||||||||||||||||||||||
PC87393 Datasheet(HTML) 113 Page - National Semiconductor (TI) |
|
113 / 148 page ![]() 7.0 X-Bus Extension (Continued) 113 www.national.com Bit Description 7-2 Reserved 1 Read/Write Extended Mode Enable. When set to 1, enables the separation of the I/O read and write transactions from pins XRD & XWR to pins XIORD & XIOWR, leaving the memory and FWH transactions to be routed to XRD and XWR. 0: Disabled (default) 1: Enabled 0 Latch Address Mode Enabled. When set to 1, enables three phases of addresses to be latched on the data pins. Reset value of this bit is set by the XCNF2-0 strap inputs. See Section 1.5.11 for the definition of this setting. 0: Disabled 1: Enabled |
|
Link URL |
| Does ALLDATASHEET help your business so far? [ DONATE ] |
About Alldatasheet | Advertisement | Contact us | Privacy Policy | Link to Datasheet | Link Exchange | Manufacturer List All Rights Reserved©Alldatasheet.com |
| Russian : Alldatasheetru.com | Korean : Alldatasheet.co.kr | Spanish : Alldatasheet.es | French : Alldatasheet.fr | Italian : Alldatasheetit.com Portuguese : Alldatasheetpt.com | Polish : Alldatasheet.pl | Vietnamese : Alldatasheet.vn Indian : Alldatasheet.in | Mexican : Alldatasheet.com.mx | British : Alldatasheet.co.uk | New Zealand : Alldatasheet.co.nz |
|
Family Site : ic2ic.com |
icmetro.com |