| Electronic Components Datasheet Search |
|
VT82C596 Datasheet(PDF) 45 Page - List of Unclassifed Manufacturers |
|
|
|||||||||||||||||||||||||||||
VT82C596 Datasheet(HTML) 45 Page - List of Unclassifed Manufacturers |
|
45 / 96 page ![]() VT82C596B Revision 0.3 June 17, 1999 -39- PCI Function 0 Registers - PCI-to-ISA Bridge 7HFKQRORJLHV ,QF :H &RQQHFW :H &RQQHFW Plug and Play Control Offset 50 - Reserved (Do Not Program) ..........................RW 7-0 Reserved .......................................... default = 24h Offset 54 - PCI IRQ Polarity............................................RW 7-4 Reserved ........................................ always reads 0 3PIRQA# 0 Non-invert (Level)..................................default 1 Invert (Edge) 2PIRQB# 0 Non-invert (Level)..................................default 1 Invert (Edge) 1PIRQC# 0 Non-invert (Level)..................................default 1 Invert (Edge) 0PIRQD# 0 Non-invert (Level)..................................default 1 Invert (Edge) Note: PIRQA-D# normally connect to PCI interrupt pins INTA-D# (see pin definitions for more information). Offset 55 - PNP IRQ Routing 1 ........................................RW 7-4 PIRQA# Routing (see PnP IRQ routing table) 3-0 PIRQ0 Routing (see PnP IRQ routing table) Offset 56 - PNP IRQ Routing 2 ........................................RW 7-4 PIRQC# Routing (see PnP IRQ routing table) 3-0 PIRQB# Routing (see PnP IRQ routing table) Offset 57 - PNP IRQ Routing 3 ........................................RW 7-4 PIRQD# Routing (see PnP IRQ routing table) 3-0 PIRQ1 Routing (see PnP IRQ routing table) Offset 58 - PNP IRQ Routing 4 ....................................... RW 7-4 Reserved ........................................ always reads 0 3-0 PIRQ2 Routing (see PnP IRQ routing table) PnP IRQ Routing Table 0000 Disabled ................................................. default 0001 IRQ1 0010 Reserved 0011 IRQ3 0100 IRQ4 0101 IRQ5 0110 IRQ6 0111 IRQ7 1000 Reserved 1001 IRQ9 1010 IRQ10 1011 IRQ11 1100 IRQ12 1101 Reserved 1110 IRQ14 1111 IRQ15 Offset 59 - PIRQ Pin Configuration (04h)...................... RW 7-3 Reserved ........................................ always reads 0 2 PIRQ2 / GPI21 Selection (Pin G3) 0PIRQ2 1 GPI21 .................................................... default 1 PIRQ1 / KEYLOCK Selection (Pin J4) 0 PIRQ1 .................................................... default 1KEYLOCK 0 PIRQ0 / GPI20 Selection (Pin H5) 0 PIRQ0 .................................................... default 1GPI20 |
|
Link URL |
| Does ALLDATASHEET help your business so far? [ DONATE ] |
About Alldatasheet | Advertisement | Contact us | Privacy Policy | Link to Datasheet | Link Exchange | Manufacturer List All Rights Reserved©Alldatasheet.com |
| Russian : Alldatasheetru.com | Korean : Alldatasheet.co.kr | Spanish : Alldatasheet.es | French : Alldatasheet.fr | Italian : Alldatasheetit.com Portuguese : Alldatasheetpt.com | Polish : Alldatasheet.pl | Vietnamese : Alldatasheet.vn Indian : Alldatasheet.in | Mexican : Alldatasheet.com.mx | British : Alldatasheet.co.uk | New Zealand : Alldatasheet.co.nz |
|
Family Site : ic2ic.com |
icmetro.com |