VT82C596 datasheet(54/96 Pages) ETC

54 / 96 page

VT82C596B

Revision 0.3 June 17, 1999

-48-

Function 1 Registers - Enhanced IDE Controller

7HFKQRORJLHV ,QF

:H &RQQHFW

Offset 13-10 - Pri Data / Command Base Address..........RW

Specifies an 8 byte I/O address space.

31-16 Reserved

..........................................always read 0

15-3 Port Address ....................................... default=01F0h

2-0

Fixed at 001b ..................................................... fixed

Offset 17-14 - Pri Control / Status Base Address............RW

Specifies a 4 byte I/O address space of which only the third

byte is active (i.e., 3F6h for the default base address of 3F4h).

31-16 Reserved

..........................................always read 0

15-2 Port Address....................................... default=03F4h

1-0

Fixed at 01b ....................................................... fixed

Offset 1B-18 - Sec Data / Command Base Address ........RW

Specifies an 8 byte I/O address space.

31-16 Reserved

..........................................always read 0

15-3 Port Address ...................................... default=0170h

2-0

Fixed at 001b ..................................................... fixed

Offset 1F-1C - Sec Control / Status Base Address..........RW

Specifies a 4 byte I/O address space of which only the third

byte is active (i.e., 376h for the default base address of 374h).

31-16 Reserved

..........................................always read 0

15-2 Port Address ...................................... default=0374h

1-0

Fixed at 01b ....................................................... fixed

Offset 23-20 - Bus Master Control Regs Base Address..RW

Specifies a 16 byte I/O address space compliant with the SFF-

8038i rev 1.0 specification.

31-16 Reserved

..........................................always read 0

15-4 Port Address ....................................... default=CC0h

3-0

Fixed at 0001b .................................................. fixed

Offset 3C - Interrupt Line (0Eh) ..................................... RW

Offset 3D - Interrupt Pin (00h)......................................... RO

7-0

Interrupt Routing Mode

00h Legacy mode interrupt routing............... default

01h Native mode interrupt routing

Offset 3E - Min Gnt (00h) ................................................. RO

Offset 3F - Max Latency (00h).......................................... RO

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