VT82C596 datasheet(60/96 Pages) ETC

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VT82C596 Datasheet(PDF) 60 Page - List of Unclassifed Manufacturers

Part #	VT82C596

Description	PCI INTEGRATED PERIPHERAL CONTROLLER

PDF	96 Pages

Scroll/Zoom	100%

Manufacturer	ETC [List of Unclassifed Manufacturers]

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60 / 96 page

VT82C596B

Revision 0.3 June 17, 1999

-54-

Function 1 Registers - Enhanced IDE Controller

7HFKQRORJLHV ,QF

:H &RQQHFW

Offset 83-80 – Primary S/G Descriptor Address ............RW

Offset 8B-88 – Secondary S/G Descriptor Address ........RW

IDE I/O Registers

These registers are compliant with the SFF 8038I v1.0

standard. Refer to the SFF 8038I v1.0 specification for further

details.

I/O Offset 0 - Primary Channel Command

I/O Offset 2 - Primary Channel Status

I/O Offset 4-7 - Primary Channel PRD Table Address

I/O Offset 8 - Secondary Channel Command

I/O Offset A - Secondary Channel Status

I/O Offset C-F - Secondary Channel PRD Table Address

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