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LM3560 Datasheet(PDF) 14 Page - Texas Instruments

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Part # LM3560
Description  Synchronous Boost Flash Driver
PDF  48 Pages
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Manufacturer  TI1 [Texas Instruments]
Direct Link  http://www.ti.com
Logo TI1 - Texas Instruments

LM3560 Datasheet(HTML) 14 Page - Texas Instruments

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LM3560
SNOSB43B – SEPTEMBER 2011 – REVISED AUGUST 2013
www.ti.com
OVER-VOLTAGE PROTECTION
The output voltage is limited to typically 5V (5.075V max). In situations such as the current source open, the
LM3560 will raise the output voltage to try to keep the LED current at its target value. When VOUT reaches 5V the
over-voltage comparator will trip and turn off both the internal NFET and PFET. When VOUT falls below 4.8V
(typical), the LM3560 will begin switching again.
CURRENT LIMIT
The LM3560 features 4 selectable current limits of 1.6A, 2.3A, 3.0A, and 3.6A. These are programmable through
the I2C-compatible interface via bits [6:5] of the Flash Duration Register. When the current limit is reached, the
LM3560 stops switching for the remainder of the switching cycle.
Since the current limit is sensed in the NMOS switch there is no mechanism to limit the current when the device
operates in Pass Mode. In situations where there could potentially be large load currents at OUT, and the
LM3560 is operating in Pass mode, the load current must be limited to 3A. In Boost mode or Pass mode if VOUT
falls below approximately 2.3V, the part stops switching and the PFET operates as a current source, limiting the
current to typically 350 mA. This prevents damage to the LM3560 and excessive current draw from the battery
during output short-circuit conditions.
THERMAL SHUTDOWN
The LM3560 features a thermal shutdown threshold of typically +150°C. When the devices die temperature
reaches +150°C the active current sources (LED1 and/or LED2) will shut down, and the TSD flag in the Flags
register is written high. The device cannot be started up again until the Flags register is read back. Once the
Flags register is read back either current source can be re-enabled into Privacy, Torch, or Flash Mode. The
thermal shutdown (TSD) circuitry has an internal 250 µs de-glitch timer which helps prevent unwanted noise from
falsely triggering a TSD event. However, when the LM3560 is in boost mode at higher flash currents, the de-
glitch timer can get reset by the high currents in the LM3560's GND. As a result the thermal shutdown's internal
de-glitch timer can be reset before the TSD event can get latched in. This prevents a TSD event from being
triggered until the LM3560's flash pulse reaches the end of the flash duration, when the noisy currents have
dropped to a lower level. However, once the noise is lower, and a TSD event is triggered, the next flash pulse is
not allowed until the flags register is read back. In pass mode the boost switcher is off and the lower noise
environment allows the devices TSD circuitry to shut down immediately when the die temperature reaches
+150°C.
FLASH MODE
In Flash mode the LED current sources (LED1 and LED2) each provide 16 different current levels from typically
62.5 mA (total) to 2A (total) in steps of 62.5 mA. The Flash currents are adjusted via the Flash Brightness
Register. Flash mode is activated by writing a (1, 1) to bits [1:0] of the Enable Register or by enabling the
hardware flash input (STROBE) via bit [2] of Configuration Register 1, and then pulling the STROBE pin high
(high polarity). Once the Flash sequence is activated the active current sources (LED1 and/or LED2) will ramp up
to their programmed Flash current level by stepping through all Torch and Flash levels (32 µs/step) until the
programmed current is reached.
Bit [5] of the Enable Register (STROBE Level/Edge bit) determines how the Flash pulse terminates after
STROBE goes high. With the Level/Edge bit = 1, the Flash current will only terminate when it reaches the end of
the Flash Timeout period. With the Level/Edge bit = 0, Flash mode can be terminated by pulling STROBE low,
programming bits [1:0] of the Enable Register with (0,0), or by allowing the Flash Timeout period to elapse. If the
Level/Edge bit = 0 and STROBE is toggled before the end of the Flash Timeout period, the Timeout period will
reset. Figure 25 and Figure 26 detail the Flash pulse termination for the different Level/Edge bit settings.
14
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