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TMS320DM641 Datasheet(PDF) 159 Page - Texas Instruments |
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TMS320DM641 Datasheet(HTML) 159 Page - Texas Instruments |
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159 / 171 page ![]() Ethernet Media Access Controller (EMAC) 159 June 2003 − Revised August 2004 SPRS222C Table 4−66. EWRAP Registers HEX ADDRESS RANGE ACRONYM REGISTER NAME 01C8 3000 EWTRCTRL TR control 01C8 3004 EWCTL Interrupt control register 01C8 3008 EWINTTCNT Interrupt timer count 01C8 300C − 01C8 37FF − Reserved 4.15.3 EMAC Electrical Data/Timing Table 4−67. Timing Requirements for MRCLK (see Figure 4−54) NO. −400 −500 −600 UNIT MIN MAX 1 tc(MRCLK) Cycle time, MRCLK 40 ns 2 tw(MRCLKH) Pulse duration, MRCLK high 14 ns 3 tw(MRCLKL) Pulse duration, MRCLK low 14 ns MRCLK 2 3 1 Figure 4−54. MRCLK Timing (EMAC − Receive) Table 4−68. Timing Requirements for MTCLK (see Figure 4−54) NO. −400 −500 −600 UNIT MIN MAX 1 tc(MTCLK) Cycle time, MTCLK 40 ns 2 tw(MTCLKH) Pulse duration, MTCLK high 14 ns 3 tw(MTCLKL) Pulse duration, MTCLK low 14 ns MTCLK 2 3 1 Figure 4−55. MTCLK Timing (EMAC − Transmit) |
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