 |
Electronic Components Datasheet Search |
|
|
Electronic Components Datasheet Search |
|
TMS320DM641 Datasheet(PDF) 165 Page - Texas Instruments |
|
|
|
|||||||||||||||||||||||||||||
TMS320DM641 Datasheet(HTML) 165 Page - Texas Instruments |
|
|
165 / 171 page  General-Purpose Input/Output (GPIO) 165 June 2003 − Revised August 2004 SPRS222C 4.18 General-Purpose Input/Output (GPIO) The GPIO peripheral provides dedicated general-purpose pins that can be configured as either inputs or outputs. When configured as an output, you can write to an internal register to control the state driven on the output pin. When configured as an input, you can detect the state of the input by reading the state of an internal register. In addition, the GPIO peripheral can produce CPU interrupts and EDMA events in different interrupt/event generation modes. 4.18.1 GPIO Device-Specific Information To use the GP[7:0] software-configurable GPIO pins, the GPxEN bits in the GP Enable (GPEN) Register and the GPxDIR bits in the GP Direction (GPDIR) Register must be properly configured. GPxEN = 1 GP[x] pin is enabled GPxDIR = 0 GP[x] pin is an input GPxDIR = 1 GP[x] pin is an output where “x” represents one of the 7 through 0 GPIO pins Figure 4−61 shows the GPIO enable bits in the GPEN register for the DM641/DM640 device. To use any of the GPx pins as general-purpose input/output functions, the corresponding GPxEN bit must be set to “1” (enabled). Default values are device-specific, so refer to Figure 4−61 for the DM641/DM640 default configuration. 31 24 23 16 Reserved R-0 15 14 13 12 11 10 9 8 7 6543 210 Reserved GP7 EN GP6 EN GP5 EN GP4 EN GP3 EN GP2 EN GP1 EN GP0 EN R/W-0000 0000 R/W-1 R/W-1 R/W-1 R/W-1 R/W-1 R/W-0 R/W-0 R/W-1 Legend: R/W = Readable/Writeable; -n = value after reset, -x = undefined value after reset Figure 4−61. GPIO Enable Register (GPEN) [Hex Address: 01B0 0000] Figure 4−62 shows the GPIO direction bits in the GPDIR register. This register determines if a given GPIO pin is an input or an output providing the corresponding GPxEN bit is enabled (set to “1”) in the GPEN register. By default, all the GPIO pins are configured as input pins. 31 24 23 16 Reserved R-0 15 14 13 12 11 10 98 7 6 5 43 2 10 Reserved GP7 DIR GP6 DIR GP5 DIR GP4 DIR GP3 DIR GP2 DIR GP1 DIR GP0 DIR R/W-0000 0000 R/W-0 R/W-0 R/W-0 R/W-0 R/W-0 R/W-0 R/W-0 R/W-0 Legend: R/W = Readable/Writeable; -n = value after reset, -x = undefined value after reset Figure 4−62. GPIO Direction Register (GPDIR) [Hex Address: 01B0 0004] For more detailed information on general-purpose inputs/outputs (GPIOs), see the TMS320C6000 DSP General-Purpose Input/Output (GPIO) Reference Guide (literature number SPRU584). |
|
Link URL |
| Does ALLDATASHEET help your business so far? [ DONATE ] |
About Alldatasheet | Advertisement | Contact us | Privacy Policy | Link to Datasheet | Link Exchange | Manufacturer List All Rights Reserved©Alldatasheet.com |
| Russian : Alldatasheetru.com | Korean : Alldatasheet.co.kr | Spanish : Alldatasheet.es | French : Alldatasheet.fr | Italian : Alldatasheetit.com Portuguese : Alldatasheetpt.com | Polish : Alldatasheet.pl | Vietnamese : Alldatasheet.vn Indian : Alldatasheet.in | Mexican : Alldatasheet.com.mx | British : Alldatasheet.co.uk | New Zealand : Alldatasheet.co.nz |
|
Family Site : ic2ic.com |
icmetro.com |
English ▼
English
Chinese
German
Japanese
Russian
Korean
Spanish
French
Italian
Portuguese
Polish
Vietnamese
Indian
Mexican
British
New Zealand
