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TFP401APZP Datasheet(PDF) 18 Page - Texas Instruments |
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TFP401APZP Datasheet(HTML) 18 Page - Texas Instruments |
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18 / 32 page ![]() 18 TFP401, TFP401A SLDS120G – MARCH 2000 – REVISED MAY 2016 www.ti.com Product Folder Links: TFP401 TFP401A Submit Documentation Feedback Copyright © 2000–2016, Texas Instruments Incorporated 10.2.2 Detailed Design Procedure 10.2.2.1 Data and Control Signals The trace length of data and control signals out of the receiver should be kept as close to equal as possible. Trace separation should be ~5X Height. As a general rule, traces also should be less than 2.8 inches if possible (longer traces can be acceptable). Delay = 85 × SQRT ER where • ER = 4.35 • Relative permittivity of 50% resin FR-4 @ 1 GHz • Delay = 177 pS/inch (1) Length of rising edge = TR(picoseconds) ÷ Delay where • TR = 3 nS • = 3000 ps ÷ 177 ps per inch • = 16.9 inches (2) Length of rising edge ÷ 6 = Max length of trace for lumped circuit where • 16.9 ÷ 6 = 2.8 inches (3) Figure 19. Data and Control Signals Design |
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