TFP401APZP datasheet(10/32 Pages) TI1

10 / 32 page

DFO, ST, PIXS, STAG,

Rx[2:0]+, Rx[2:0]–,

OCK_INV

p(PDH-V)

twL(PDL_MIN)

VIL

QE[23:0], QO[23:0],

ODCK, DE, CTL[3:1],

HSYNC, VSYNC, SCDT

pd(PDL)

QE[23:0], QO[23:0],

ODCK, DE, CTL[3:2],

HSYNC, VSYNC

PDO

pd(PDOL)

50%

d(st)

ODCK

QE[23:0]

50%

Rx+

Rx–

QE[23:0], QO[23:0] DE,

CTL[3:1], HSYNC, VSYNC

(su1)

(h1)

(h2)

(su2)

ODCK

OCK_INV

80%

20%

80%

20%

tr2

tf2

ODCK

1/f

ODCK

QE[23:0], QO[23:0], DE,

CTK[3:1], HSYNC, VSYNC

20%

80%

20%

TFP401, TFP401A

SLDS120G – MARCH 2000 – REVISED MAY 2016

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Product Folder Links: TFP401 TFP401A

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8 Parameter Measurement Information

Figure 2. Rise and Fall Times of Data and Control Signals

Figure 3. Rise and Fall Times of ODCK

Figure 4. ODCK Frequency

Figure 5. Data Setup and Hold Times to Rising and Falling Edges of ODCK

Figure 6. ODCK High to QE[23:0] Staggered Data

Output

Figure 7. Analog Input Intra-Pair Differential Skew

Figure 8. Delay From PD Low to Hi-Z Outputs

Figure 9. Delay From PDO Low to Hi-Z Outputs

Figure 10. Delay From PD Low to High Before

Inputs Are Active

Figure 11. Minimum Time PD Low

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