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TFP401, TFP401A

SLDS120G – MARCH 2000 – REVISED MAY 2016

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Copyright © 2000–2016, Texas Instruments Incorporated

(1)

Stresses beyond those listed under Absolute Maximum Ratings may cause permanent damage to the device. These are stress ratings

only, and functional operation of the device at these or any other conditions beyond those indicated under Recommended Operating

Conditions is not implied. Exposure to absolute-maximum-rated conditions for extended periods may affect device reliability.

(2)

Specified with PowerPAD bond pad on the backside of the package soldered to a 2-oz. (0.071-mm thick) Cu plate PCB thermal plane.

Specified at maximum allowed operating temperature, 70°C.

(3)

PowerPAD bond pad on the backside of the package is not soldered to a thermal plane. Specified at maximum allowed operating

temperature, 70°C.

7 Specifications

7.1 Absolute Maximum Ratings

(1)

over operating free-air temperature range (unless otherwise noted)

MIN

MAX

UNIT

Supply voltage

–0.3

4

V

Input voltage range, logic/analog signals

–0.3

4

V

Operating ambient temperature

0

70

°C

Package power dissipation/PowerPAD

package

4.3

W

2.7

JEDEC latchup (EIA/JESD78)

100

mA

Storage temperature

–65

150

°C

(1)

JEDEC document JEP155 states that 500-V HBM allows safe manufacturing with a standard ESD control process.

(2)

JEDEC document JEP157 states that 250-V CDM allows safe manufacturing with a standard ESD control process.

7.2 ESD Ratings

VALUE

UNIT

Electrostatic discharge

±2500

V

Charged-device model (CDM), per JEDEC specification JESD22-

±1000

(1)

7.3 Recommended Operating Conditions

MIN

NOM

MAX

UNIT

3

3.3

3.6

V

(1)

Pixel time

6.06

40

ns

Single-ended analog-input termination resistance

45

50

55

Ω

Operating free-air temperature

0

25

70

°C

(1)

For more information about traditional and new thermal metrics, see the IC Package Thermal Metrics application report, SPRA953.

7.4 Thermal Information

TFP401, TFP401A

UNIT

PZP (HTQFP)

100 PINS

Junction-to-ambient thermal resistance

26

°C/W

Junction-to-case (top) thermal resistance

12.3

Junction-to-board thermal resistance

7.3

Junction-to-top characterization parameter

0.3

Junction-to-board characterization parameter

7.2

Junction-to-case (bottom) thermal resistance

1.6