TMS320UC5409 datasheet(73/81 Pages) TI1

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TMS320UC5409

FIXEDPOINT DIGITAL SIGNAL PROCESSOR

SPRS101E − APRIL 1999 − REVISED OCTOBER 2008

POST OFFICE BOX 1443

• HOUSTON, TEXAS 77251−1443

HPI16 timing (continued)

timing requirements†‡§ [H = 0.5tc(CO)] (see Note 1, Figure 42, and Figure 43)

MIN

MAX

UNIT

tsu(HBV-DSL)

Setup time, HAD valid before DS falling edge†‡

th(DSL-HBV)

Hold time, HAD valid after DS falling edge†‡

tsu(HAV-DSL)

Setup time, HAD valid before DS falling edge†

th(DSH-HAV)

Hold time, address valid after DS rising edge†

tsu(HDV-DSH)

Setup time, Dx valid before DS high (HPI write)

th(DSH-HDV)W

Hold time, Dx valid aftere DS high (HPI write)

tw(DSL)

Pulse duration, DS low‡

tw(DSH)

Pulse duration, DS high‡

tsu(GPIO-COH)

Setup time, Dx input valid before CLKOUT high, HDx configured as general-purpose input

th(GPIO-COH)

Hold time, Dx input valid after CLKOUT high, HDx configured as general-purpose input

tc(DSH-DSH)

Cycle time, DS rising edge to next DS rising

edge‡

Nonmultiplexed mode (no increment)

with no DMA activity.

tc(DSH-DSH)

(Minimum timings represent WRITEs while

maximum timings represent READs)

Nonmultiplexed mode (no increment)

with 16-bit DMA activity.

† DS refers to the logical OR of HCS and HDS1 and HDS2.

‡ .Dx refers to any of the HPI data bus pins (D0, D1, D2, etc.).

§ GPIO refers tothe HD pins when they are configured as general-purpose input/outputs.

Not Recommended For New Designs

TMS320UC5409 Datasheet(PDF) 73 Page - Texas Instruments

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