TMS320UC5409 datasheet(13/81 Pages) TI1

13 / 81 page

TMS320UC5409

FIXEDPOINT DIGITAL SIGNAL PROCESSOR

SPRS101E − APRIL 1999 − REVISED OCTOBER 2008

POST OFFICE BOX 1443

• HOUSTON, TEXAS 77251−1443

on-chip ROM with bootloader (continued)

The standard on-chip ROM layout is shown in Table 1.

Table 1. Standard On-Chip ROM Layout†

ADDRESS RANGE

DESCRIPTION

0x0000h − 0xBFFFh

External program space

0xC000h − 0xF7FFh

Reserved

0xF800h − 0xFBFFh

Bootloader

0xFC00h − 0xFEFFh

Reserved

0xFF00h − 0xFF7Fh

Reserved†

0xFF80h − 0xFFFFh

Interrupt vector table

† In the VC5409 ROM, 128 words are reserved for factory device-testing purposes. Application

code to be implemented in on-chip ROM must reserve these 128 words at addresses

FF00h–FF7Fh in program space.

on-chip RAM

The UC5409 device contains 32K

× 16-bit of on-chip dual-access RAM (DARAM). The DARAM is composed

of four blocks of 8K words each. Each block in the DARAM can support two reads in one cycle, or a read and

a write in one cycle. The DARAM is located in the address range 0080h−7FFFh in data space, and can be

mapped into program/data space by setting the OVLY bit to one.

Not Recommended For New Designs

TMS320UC5409 Datasheet(PDF) 13 Page - Texas Instruments