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TMS570LS3137 Datasheet(PDF) 129 Page - Texas Instruments

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Part # TMS570LS3137
Description  TMS570LS3137 16- and 32-Bit RISC Flash Microcontroller
PDF  173 Pages
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Manufacturer  TI1 [Texas Instruments]
Direct Link  http://www.ti.com
Logo TI1 - Texas Instruments

TMS570LS3137 Datasheet(HTML) 129 Page - Texas Instruments

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TMS570LS3137
www.ti.com
SPNS162C – APRIL 2012 – REVISED APRIL 2015
Table 7-11. Input Timing Requirements for the N2HET Input Capture Functionality
NO.
MIN(1) (2)
MAX(1) (2)
UNIT
Input signal period, PCNT or WCAP for rising edge to rising
1
2 (hr) (lr) tc(VCLK2) + 2
225 (hr) (lr) tc(VCLK2) - 2
ns
edge
Input signal period, PCNT or WCAP for falling edge to falling
2
2 (hr) (lr) tc(VCLK2) + 2
225 (hr) (lr) tc(VCLK2) - 2
ns
edge
Input signal high phase, PCNT or WCAP for rising edge to
3
(hr) (lr) tc(VCLK2) + 2
225 (hr) (lr) tc(VCLK2) - 2
ns
falling edge
Input signal low phase, PCNT or WCAP for falling edge to
4
(hr) (lr) tc(VCLK2) + 2
225 (hr) (lr) tc(VCLK2) - 2
ns
rising edge
(1)
hr = High-resolution prescaler, configured using the HRPFC field of the Prescale Factor Register (HETPFR).
(2)
lr = Loop-resolution prescaler, configured using the LFPRC field of the Prescale Factor Register (HETPFR).
Both N2HET1 and N2HET2 have channels that are enhanced to be able to capture inputs with smaller
pulse widths than that specified in Table 7-11. See Table 7-13 for a list of which pins support small pulse
capture.
The input capture capability for these channels is specified in Table 7-12.
Table 7-12. Input Timing Requirements for N2HET Channels with Enhanced Pulse Capture
NO.
MIN
MAX
UNIT
Input signal period, PCNT or WCAP for rising edge to rising
1
(hr) (lr) tc(VCLK2) + 2
225 (hr) (lr) tc(VCLK2) - 2
ns
edge
Input signal period, PCNT or WCAP for falling edge to falling
2
(hr) (lr) tc(VCLK2) + 2
225 (hr) (lr) tc(VCLK2) - 2
ns
edge
Input signal high phase, PCNT or WCAP for rising edge to
3
2 (hr) tc(VCLK2) + 2
225 (hr) (lr) tc(VCLK2) - 2
ns
falling edge
Input signal low phase, PCNT or WCAP for falling edge to
4
2 (hr) tc(VCLK2) + 2
225 (hr) (lr) tc(VCLK2) - 2
ns
rising edge
Table 7-13. Input Capture Pin Capability
CHANNEL
SUPPORTS 32-BIT CAPTURE
ENHANCED PULSE CAPTURE
N2HET1[00]
Yes
No
N2HET1[01]
Yes
No
N2HET1[02]
Yes
No
N2HET1[03]
Yes
No
N2HET1[04]
Yes
No
N2HET1[05]
Yes
No
N2HET1[06]
Yes
No
N2HET1[07]
Yes
No
N2HET1[08]
Yes
No
N2HET1[09]
Yes
No
N2HET1[10]
Yes
No
N2HET1[11]
Yes
No
N2HET1[12]
Yes
No
N2HET1[13]
Yes
No
N2HET1[14]
Yes
No
N2HET1[15]
Yes
Yes
N2HET1[16]
Yes
No
N2HET1[17]
Yes
No
N2HET1[18]
Yes
No
N2HET1[19]
Yes
No
N2HET1[20]
Yes
Yes
Copyright © 2012–2015, Texas Instruments Incorporated
Peripheral Information and Electrical Specifications
129
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