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TMS570LS3137 Datasheet(PDF) 133 Page - Texas Instruments |
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TMS570LS3137 Datasheet(HTML) 133 Page - Texas Instruments |
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133 / 173 page  VCCIO 0.6*VCCIO 0.4*VCCIO 0 Input tpw 0.6*VCCIO 0.4*VCCIO TMS570LS3137 www.ti.com SPNS162C – APRIL 2012 – REVISED APRIL 2015 7.5 FlexRay Interface The FlexRay module performs communication according to the FlexRay protocol specification v2.1. The sample clock bit rate can be programmed to values up to 10 Mbps. Additional bus driver (BD) hardware is required for connection to the physical layer. For communication on a FlexRay network, individual message buffers with up to 254 data bytes are configurable. The message storage consists of a single-ported message RAM that holds up to 128 message buffers. All functions concerning the handling of messages are implemented in the message handler. Those functions are the acceptance filtering, the transfer of messages between the two FlexRay Channel Protocol Controllers and the message RAM, maintaining the transmission schedule, as well as providing message status information. The register set of the FlexRay module can be accessed directly by the CPU through the VBUS interface. These registers are used to control, configure, and monitor the FlexRay channel protocol controllers, message handler, global time unit, system universal control, frame/symbol processing, network management, interrupt control, and to access the message RAM through the I/O buffer. 7.5.1 Features The FlexRay module has the following features: • Conformance with FlexRay protocol specification v2.1 • Data rates of up to 10 Mbps on each channel • Up to 128 message buffers • 8KB of message RAM for storage (for example, 128 message buffers with maximum of 48-byte data section or up to 30 message buffers with 254-byte data section) • Configuration of message buffers with different payload lengths • One configurable receive FIFO • Each message buffer can be configured as receive buffer, as transmit buffer or as part of the receive FIFO. • CPU access to message buffers through input and output buffer • FlexRay Transfer Unit (FTU) for automatic data transfer between data memory and message buffers without CPU interaction • Filtering for slot counter, cycle counter, and channel ID • Maskable module interrupts • Supports Network Management 7.5.2 Electrical and Timing Specifications Table 7-16. Timing Requirements for FlexRay Inputs MIN MAX UNIT Input minimum pulse width to meet the FlexRay sampling tpw tc(AVCLK2) + 2.5 (1) ns requirement (1) tRxAsymDelay parameter Figure 7-8. FlexRay Inputs Copyright © 2012–2015, Texas Instruments Incorporated Peripheral Information and Electrical Specifications 133 Submit Documentation Feedback |
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