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GS2985 Datasheet(PDF) 26 Page - Semtech Corporation

Part # GS2985
Description  Multi-Rate SDI Reclocker with Equalization & De-emphasis
PDF  45 Pages
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Manufacturer  SEMTECH [Semtech Corporation]
Direct Link  http://www.semtech.com
Logo SEMTECH - Semtech Corporation

GS2985 Datasheet(HTML) 26 Page - Semtech Corporation

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GS2985 Multi-Rate SDI Reclocker with Equalization &
De-emphasis
Data Sheet
36663 - 5
July 2012
26 of 45
Proprietary & Confidential
4.12 Bypass Mode
In bypass mode, the GS2985 passes the data at the inputs, directly to the output. There
are two pins that control the bypass function: BYPASS and AUTOBYPASS.
The BYPASS pin is an active-high signal which forces the GS2985 into bypass mode for
as long as the pin is asserted HIGH.
The AUTOBYPASS pin is an active-high signal that places the GS2985 into bypass mode
only when the PLL has not locked to a data rate.
Note that if BYPASS is HIGH, this will override the AUTOBYPASS functionality.
When the GS2985's PLL is not locked and BYPASS = LOW and AUTOBYPASS = LOW, the
serial digital output DDO/DDO will produce invalid data.
The AUTOBYPASS function will bypass unsupported (non-reclocked) SMPTE SDI signal
rates without producing bit errors: 143Mb/s, 177Mb/s, 360Mb/s, 540Mb/s.
4.13 DVB-ASI
The GS2985 also reclocks DVB-ASI signals at 270Mb/s. In auto mode, the device will
automatically lock to the incoming 270Mb/s signal. In manual mode, the SS[1:0] bits
must be set to 01 (270Mb/s) to ensure proper operation.
4.14 Output Mute and Data/Clock Output Selection
The DATA_MUTE pin is provided to allow muting of the serial digital data output.
Setting DATA_MUTE = LOW will force the serial digital outputs DDO/DDO to mute
(statically latch HIGH) under all conditions and operating modes.
The DDO1_DISABLE pin is provided to allow the second data/clock output to be
powered down.
When DDO1_DISABLE is set LOW, the serial digital clock outputs DDO1/RCO and
DDO1/RCO are muted and the driver is powered-down.
The DATA/CLOCK pin is provided to allow the second output to emit a copy of the
reclocked serial data or the recovered clock.
Table 4-9: Bypass Modes
Bypass
Autobypass
Device Operation
HIGH
X
Bypass Mode
LOW
HIGH
Bypass Mode if the PLL has not
locked to a data rate
LOW
LOW
Power-up default. Normal
Operation, part always tries to
lock to the incoming data
stream.



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