NCP3235

www.onsemi.com

2

Figure 1. NCP3235 Block Diagram

VSWH

VB

BST

Control Logic

Ramp Generator

PWM Logic

−and−

UVLO

OVP, UVP

Power Good

OCP, TSD

Protection

PGND

VCC

VB

FB

COMP

E/A

VREF

SS

ISET

VIN

AGND

VB

VB

VCC

EN

VCC

Enable

Logic

POR

2

mA

VB

PG

1.2V

Soft Start

LDO

OSC

VB

VB

Mode

Selection

MODE

VSW

Table 1. PIN DESCRIPTION

Pin No.

Symbol

Description

1

SS

A capacitor from this pin to GND allows the user to adjust the soft−start ramp time.

2

FB

Output voltage feedback.

3

COMP

Output of the error amplifier.

4

ISET

A resistor from this pin to ground sets the over−current protection (OCP) threshold.

5, 37

AGND

Analog ground.

6

MODE

Mode selection for FCCM mode and automatic CCM/DCM mode, switching frequency and hiccup/latch pro-

tection mode. See table I in the latter page.

7

PG

Power good indicator of the output voltage. Open−drain output. Connect PG to VDD with an external resistor.

8−14,

EP42

VIN

The VIN pin is connected to the internal power NMOS switch. The VIN pin has high di/dt edges and must be

decoupled to ground close to the pin of the device.

15, 29−34,

EP43

VSWH

The VSWH pin is the connection of the drain and source of the internal NMOS switches. At switch off, the

inductor will drive this pin below ground as the body diode and the NMOS conducts with a high dv/dt.

16−28

PGND

Ground reference and high−current return path for the bottom gate driver and low− side NMOS.

35

VSW

IC connection to the switch node between the top MOSFET and bottom MOSFET. Return path of the high−

side gate driver.

36

BST

Top gate driver input supply, a bootstrap capacitor connection between the switch node and this pin.

38

VB

The internal LDO output and supply for the NCP3235. Connect a minimum of 4.7uF ceramic capacitor from

this pin to ground.

39

VCC

Input Supply for IC. This pin must be connected to VIN.

40

EN

Logic control for enabling the switcher. An internal pull−up enables the device automatically. The EN pin can

also be driven high to turn on the device, or low to turn off the device. A comparator and precision reference

allow the user to implement this pin as an adjustable UVLO circuit.

EP41

GND

Exposed Pad. Connect GND to a large copper plane at ground potential to improve thermal dissipation.