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TPS2221 Datasheet(PDF) 4 Page - Texas Instruments

Part # TPS2221
Description  PC CARD POWER-INTERFACE SWITCH FOR PCMCIA CONTROLLERS
PDF  23 Pages
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Manufacturer  TI [Texas Instruments]
Direct Link  http://www.ti.com
Logo TI - Texas Instruments

TPS2221 Datasheet(HTML) 4 Page - Texas Instruments

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TPS2228
TPS2221
SLVS419A – MAY 2002 REVISED SEPTEMBER 2002
www.ti.com
4
ELECTRICAL CHARACTERISTICS (continued)
TJ = –40°C to 100°C, VI(5VIN) = 5 V, VI(3.3VIN) = 3.3 V, VI(1.8VIN) = 1.8 V, all outputs unloaded (unless otherwise noted)(1)
PARAMETER
UNIT
MAX
TYP
MIN
TEST CONDITIONS
POWER SWITCH (continued)
Forward leakage
I
g
current Ilkg_FWD
(current measured
IO(xVCC)
All switches are in Hi-Z state
110
µA
(current measured
from output pins
I
All switches are in Hi Z state
xVCC and xVPP/VCORE are grounded
µA
from output pins
to ground)
IO(xVPP/VCORE)
110
Reverse leakage
I
1
10
Reverse leakage
current Ilk RVS
IO(3.3VIN)
All switches are in Hi Z state
110
current Ilkg_RVS
(current measured
I
All switches are in Hi-Z state,
3 3VIN 5VIN and 1 8VIN are grounded
1
10
µA
(current measured
ft
t i
IO(5VIN)
3.3VIN, 5VIN, and 1.8VIN are grounded
V
V
5V
110
µA
from output pins
ii )
I
VO(xVPP/VCORE) = VO(xVCC) = 5 V
1
10
going in)
IO(1.8VIN)
()
()
1
10
(1) Pulse-testing techniques maintain junction temperature close to ambient temperature; thermal effects must be taken into account separately.
(2) Specified by design, not tested in production.
(3) From application of short to 110% of final current limit.
ELECTRICAL CHARACTERISTICS
TJ = –40°C to 100°C, VI(5VIN) = 5 V, VI(3.3VIN) = 3.3 V, VI(1.8VIN) = 1.8 V, all outputs unloaded (unless otherwise noted)(1)
PARAMETER
TEST CONDITIONS(1)
MIN
TYP
MAX
UNIT
LOGIC SECTION (CLOCK, DATA, LATCH, RESET, SHDN, OC, VDO, VD1, VD2, VD3)
I(RESET
)(3)
RESET = 5.5 V, sinking or sourcing
0
1
I(RESET
)(3)
RESET = 0 V, sourcing
10
30
I(SHDN)(3) Or
SHDN or SHDN_RST = 5.5 V, sinking or sourcing
0
1
Logic input current
I(SHDN)() Or
I(SHDN_RST)(3)
SHDN or SHDN_RST = 0 V, sourcing
10
30
µA
Logic input current
I(LATCH)(1)
LATCH = 5.5 V, sinking
50
µA
I(LATCH)(1)
LATCH = 0 V, sinking or sourcing
1
I(CLOCK,DATA, VD0, VD1,
VD2, VD3)
0 V to 5.5 V, sinking or sourcing
1
Logic input high level(4)
2
Logic input low level(4)
0.8
V
OC output saturation voltage
IO = 2 mA
0.4
V
OC leakage current
VO(OC) = 5.5 V
1
µA
OC d
lit h(2)
Falling edge
Falling into overcurrent condition
5
15
S
OC deglitch(2)
Rising edge
Coming out of overcurrent condition
5
15
mS
PARAMETER
TEST CONDITIONS(1)
MIN
TYP
MAX
UNIT
UVLO
3.3VIN UVLO
3.3VIN level below which all switches are in Hi-Z state
2.2
2.9
3.3VIN Hysteresis(2)
0.1
V
5VIN UVLO
5VIN level below which only 5VIN switches are in Hi-Z state
2.0
2.6
V
5VIN Hysteresis(2)
80
mV
1.8VIN UVLO
1.8VIN level below which only 1.8VIN switches are in Hi-Z state
1.25
1.62
V
1.8VIN Hysteresis(2)
50
mV
(1) Refer to Parameter Measurement Information, Figure 1.
(2) Specified by design, not tested in production.
(3) RESET and SHDN (or SHDN/RST for TPS2221) have low current pullup; LATCH has low current pulldown.
(4) For recommended operating ranges only.



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