ADS1216 datasheet(14/28 Pages) TI

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ADS1216

SBAS171B

VOLTAGE REFERENCE

The voltage reference used for the ADS1216 can either be

internal or external. The power-up configuration for the

voltage reference is 2.5V internal. The selection for the

voltage reference is made through the status configuration

The internal voltage reference is selectable as either 1.25V

or 2.5V (AVDD = 5V only). The VREFOUT pin should have a

0.1

µF capacitor to AGND.

The external voltage reference is differential and is repre-

sented by the voltage difference between the pins: +VREF

and –VREF. The absolute voltage on either pin (+VREF and

–VREF) can range from AGND to AVDD, however, the

differential voltage must not exceed 2.5V. The differential

voltage reference provides easy means of performing

ratiometric measurement.

VRCAP PIN

This pin provides a bypass cap for noise filtering on internal

VREF circuitry only. The recommended capacitor is a 0.001µF

ceramic cap. If an external VREF is used, this pin can be left

unconnected.

CLOCK GENERATOR

The clock source for the ADS1216 can be provided from a

crystal, ceramic resonator, oscillator, or external clock. When

the clock source is a crystal or ceramic resonator, external

capacitors must be provided to ensure start-up and a stable

clock frequency. This is shown in Figure 4 and Table I.

DIGITAL I/O INTERFACE

The ADS1216 has eight pins dedicated for digital I/O. The

default power-up condition for the digital I/O pins are as

inputs. All of the digital I/O pins are individually configurable

as inputs or outputs. They are configured through the DIR

control register. The DIR register defines whether the pin is an

input or output, and the DIO register defines the state of the

digital output. When the digital I/O are configured as inputs,

DIO is used to read the state of the pin.

SERIAL INTERFACE

The serial interface is standard four-wire SPI compatible (DIN,

DOUT, SCLK, and CS). The ADS1216 also offers the flexibil-

ity to select the polarity of the serial clock through the POL

pin. The serial interface can be clocked up to fOSC/4.

Serial communication can occur independent of DRDY,

DRDY only indicates the validity of data in the data output

DSYNC OPERATION

DSYNC is used to provide for precise synchronization of the

A/D conversion with an external event. Synchronization can

be achieved either through the DSYNC pin or the DSYNC

command. When the DSYNC pin is used, the filter counter

is reset on the falling edge of DSYNC. The filter values are

useless, they should be treated as if the input channel was

changed. The modulator is held in reset until DSYNC is

taken HIGH. Synchronization occurs on the next rising edge

of the system clock after DSYNC is taken HIGH.

When the DSYNC command is sent, the filter counter is

reset on the edge of the last SCLK on the DSYNC command.

The modulator is held in RESET until the next edge of

SCLK is detected. Synchronization occurs on the next rising

edge of the system clock after the first SCLK after the

DSYNC command.

POWER-UP—SUPPLY VOLTAGE RAMP RATE

The power-on reset circuitry was designed to accommodate

digital supply ramp rates as slow as 1V/10ms. To ensure

proper operation, the power supply should ramp monotoni-

cally.

RESET

There are three methods of reset. The RESET pin, SCLK

pattern, and the RESET command. They all perform the

same function. The Power ON state also issues the RESET

command.

MEMORY

Two types of memory are used on the ADS1216: registers

and RAM. 16 registers directly control the various functions

(PGA, DAC value, Decimation Ratio, etc.) and can be

directly read or written to. Collectively, the registers contain

all the information needed to configure the part, such as data

format, mux settings, calibration settings, decimation ratio,

etc. Additional registers, such as output data, are accessed

through dedicated instructions.

FIGURE 4. Crystal or Ceramic Resonator Connection.

CLOCK

PART

SOURCE

FREQUENCY

NUMBER

Crystal

2.4576

0-20pF

ECS, ECSD 2.45 - 32

Crystal

4.9152

0-20pF

ECS, ECSL 4.91

Crystal

4.9152

0-20pF

ECS, ECSD 4.91

Crystal

4.9152

0-20pF

CTS, MP 042 4M9182

TABLE I. Typical Clock Sources.

Crystal

Ceramic Resonator

OUT

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