ADS1216 datasheet(17/28 Pages) TI

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ADS1216

SBAS171B

ODAC (Address 05H) Offset DAC Setting

Reset Value = 00H

bit 7

Offset Sign

0 = Positive

1 = Negative

bit 6-0 Offset =

NOTE: The offset must be used after calibration or the

calibration will notify the effects.

DIO (Address 06H) Digital I/O

Reset Value = 00H

A value written to this register will appear on the digital

I/O pins if the pin is configured as an output in the DIR

digital I/O pins.

DIR (Address 07H) Direction control for digital I/O

Reset Value = FFH

Each bit controls whether the Digital I/O pin is an output

(= 0) or input (= 1). The default power-up state is as inputs.

DEC0 (Address 08H) Decimation Register

(Least Significant 8 bits)

Reset Value = 80H

The decimation value is defined with 11 bits for a range of

20 to 2047. This register is the least significant 8 bits. The

3 most significant bits are contained in the M/DEC1 register.

The default data rate is 10Hz with a 2.4576MHz crystal.

M/DEC1 (Address 09H) Mode and Decimation Register

Reset Value = 07H

bit 7

DRDY: Data Ready (Read Only)

This bit duplicates the state of the DRDY pin.

bit 6

U/B: Data Format

0 = Bipolar (default)

1 = Unipolar

bit 5-4 SMODE1: SMODE0: Settling Mode

00 = Auto (default)

01 = Fast Settling filter

10 = Sinc2 filter

11 = Sinc3 filter

bit 2-0 DEC10: DEC09: DEC08: Most Significant Bits of

the Decimation Value

OCR0 (Address 0AH) Offset Calibration Coefficient

(Least Significant Byte)

Reset Value = 00H

OCR1 (Address 0BH) Offset Calibration Coefficient

(Middle Byte)

Reset Value = 00H

OCR2 (Address 0CH) Offset Calibration Coefficient

(Most Significant Byte)

Reset Value = 00H

FSR0 (Address 0DH) Full-Scale Register

(Least Significant Byte)

Reset Value = 24H

FSR1 (Address 0EH) Full-Scale Register

(Middle Byte)

Reset Value = 90H

FSR2 (Address 0FH) Full-Scale Register

(Most Significant Byte)

Reset Value = 67H

PGA

Code

REF

127

•

• 





bit 7

bit 6

bit 5

bit 4

bit 3

bit 2

bit 1

bit 0

SIGN

OSET6

OSET5

OSET4

OSET3

OSET2

OSET1

OSET0

bit 7

bit 6

bit 5

bit 4

bit 3

bit 2

bit 1

bit 0

DIO7

DIO6

DIO5

DIO4

DIO3

DIO2

DIO1

DIO0

bit 7

bit 6

bit 5

bit 4

bit 3

bit 2

bit 1

bit 0

DIR7

DIR6

DIR5

DIR4

DIR3

DIR2

DIR1

DIR0

bit 7

bit 6

bit 5

bit 4

bit 3

bit 2

bit 1

bit 0

DEC07

DEC06

DEC05

DEC04

DEC03

DEC02

DEC01

DEC00

bit 7

bit 6

bit 5

bit 4

bit 3

bit 2

bit 1

bit 0

DRDY

U/B

SMODE1 SMODE0

Reserved

DEC10

DEC09

DEC08

U/B

ANALOG INPUT

DIGITAL OUTPUT

+FS

0x7FFFFF

Zero

0x000000

–FS

0x800000

+FS

0xFFFFFF

Zero

0x000000

–FS

0x000000

bit 7

bit 6

bit 5

bit 4

bit 3

bit 2

bit 1

bit 0

OCR07

OCR06

OCR05

OCR04

OCR03

OCR02

OCR01

OCR00

bit 7

bit 6

bit 5

bit 4

bit 3

bit 2

bit 1

bit 0

OCR15

OCR14

OCR13

OCR12

OCR11

OCR10

OCR09

OCR08

bit 7

bit 6

bit 5

bit 4

bit 3

bit 2

bit 1

bit 0

OCR23

OCR22

OCR21

OCR20

OCR19

OCR18

OCR17

OCR16

bit 7

bit 6

bit 5

bit 4

bit 3

bit 2

bit 1

bit 0

FSR07

FSR06

FSR05

FSR04

FSR03

FSR02

FSR01

FSR00

bit 7

bit 6

bit 5

bit 4

bit 3

bit 2

bit 1

bit 0

FSR15

FSR14

FSR13

FSR12

FSR011

FSR10

FSR09

FSR08

bit 7

bit 6

bit 5

bit 4

bit 3

bit 2

bit 1

bit 0

FSR23

FSR22

FSR21

FSR20

FSR019

FSR18

FSR17

FSR16

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