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DS3134 Datasheet(PDF) 169 Page - Dallas Semiconductor |
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DS3134 Datasheet(HTML) 169 Page - Dallas Semiconductor |
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169 / 203 page ![]() DS3134 169 of 203 10.2 LOCAL BUS BRIDGE MODE CONTROL REGISTER DESCRIPTION Register Name: LBBMC Register Description: Local Bus Bridge Mode Control Register Register Address: 0040h Note: This register can only be accessed via the PCI Bus and hence only in the PCI Bridge Mode. In the Configuration Mode, this register cannot be accessed. It will be set to all zeros upon a hardware reset issued via the PRST* pin. It will not be affected by a software reset issued via the RST control bit in the Master Reset and ID (MRID) register. 76 5432 10 n/a LBW LRDY3 LRDY2 LRDY1 LRDY0 LARBE LCLKE 15 14 13 12 11 10 9 8 n/a n/a n/a n/a LAT3 LAT2 LAT1 LAT0 Note: Bits that are underlined are read only, all other bits are read-write; default value for all bits is 0. Bit 0 / Local Bus Clock Enable (LCLKE). 0 = tri-state the LCLK output signal pin 1 = allow LCLK to appear at the pin Bit 1 / Local Bus Arbitration Enable (LARBE). When enabled, the LHOLD(LBR*), LBGACK*, and LHLDA(LBG*) signal pins are active and the proper arbitration handshake sequence must occur for a proper bus transaction. When disabled, the LHOLD(LBR*), LBGACK* and LHLDA(LBG*) signal pins are deactivated and bus arbitration on the Local Bus is not invoked. In addition, the Arbitration Timer is enabled (see the description of the LAT0 to LAT3 bits) when LARBE is set to a one. 0 = Local Bus Arbitration is disabled 1 = Local Bus Arbitration is enabled Bit 2 / Local Bus Ready Control Bit 0 (LRDY0). lsb Bit 3 / Local Bus Ready Control Bit 1 (LRDY1). Bit 4 / Local Bus Ready Control Bit 2 (LRDY2). Bit 5 / Local Bus Ready Control Bit 3 (LRDY3). msb These control bits determine the duration of the Local Bus transaction in the PCI Bridge Mode. The bus transaction can either be control via the external LRDY* input signal or via a predetermined period of 1 to 11 LCLK periods. 0000 = use the LRDY* signal input pin to control the bus transaction 0001 = bus transaction is defined as 1 LCLK period 0010 = bus transaction is defined as 2 LCLK periods 0011 = bus transaction is defined as 3 LCLK periods 0100 = bus transaction is defined as 4 LCLK periods 0101 = bus transaction is defined as 5 LCLK periods 0110 = bus transaction is defined as 6 LCLK periods 0111 = bus transaction is defined as 7 LCLK periods 1000 = bus transaction is defined as 8 LCLK periods 1001 = bus transaction is defined as 9 LCLK periods 1010 = bus transaction is defined as 10 LCLK periods |
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