DS3134 datasheet(181/203 Pages) DALLAS

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DS3134

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Capture-DR

Data may be parallel loaded into the Test Data registers selected by the current instruction.

If the

instruction does not call for a parallel load or the selected register does not allow parallel loads, the Test

Shift-DR state if JTMS is low or it will go to the Exit1-DR state if JTMS is high.

Shift-DR

The Test Data register selected by the current instruction will be connected between JTDI and JTDO and

will shift data one stage towards its serial output on each rising edge of JTCLK. If a Test register selected

by the current instruction is not placed in the serial path, it will maintain its previous state.

Exit1-DR

While in this state, a rising edge on JTCLK with JTMS high will put the controller in the Update-DR

state, which terminates the scanning process. A rising edge on JTCLK with JTMS low will put the

controller in the Pause-DR state.

Pause-DR

Shifting of the Test registers is halted while in this state. All Test registers selected by the current

instruction will retain their previous state. The controller will remain in this state while JTMS is low. A

rising edge on JTCLK with JTMS high will put the controller in the Exit2-DR state.

Exit2-DR

While in this state, a rising edge on JTCLK with JTMS high will put the controller in the Update-DR state

and terminate the scanning process. A rising edge on JTCLK with JTMS low will enter the Shift-DR

state.

Update-DR

A falling edge on JTCLK while in the Update-DR state will latch the data from the shift register path of

the Test registers into the data output latches. This prevents changes at the parallel output due to changes

in the shift register. A rising edge on JTCLK with JTMS low, will put the controller in the Run-Test-Idle

state. With JTMS high, the controller will enter the Select-DR-Scan state.

Select-IR-Scan

All Test registers retain their previous state. The Instruction register will remain unchanged during this

state. With JTMS low, a rising edge on JTCLK moves the controller into the Capture-IR state and will

initiate a scan sequence for the Instruction register. JTMS high during a rising edge on JTCLK puts the

controller back into the Test-Logic-Reset state.

Capture-IR

The Capture-IR state is used to load the shift register in the Instruction register with a fixed value. This

value is loaded on the rising edge of JTCLK. If JTMS is high on the rising edge of JTCLK, the controller

will enter the Exit1-IR state. If JTMS is low on the rising edge of JTCLK, the controller will enter the

Shift-IR state.

DS3134 Datasheet(PDF) 181 Page - Dallas Semiconductor